[Intel-gfx] [PATCH 09/18] drm/i915/skl: Implement WaEnableLbsSlaRetryTimerDecrement

Nick Hoath nicholas.hoath at intel.com
Thu Feb 12 07:09:25 PST 2015


On 09/02/2015 19:33, Damien Lespiau wrote:
> This W/A is put in a gen9 specific function because it may well be
> needed on other gen9 platforms.
>
> Signed-off-by: Damien Lespiau <damien.lespiau at intel.com>

Reviewed-by: Nick Hoath <nicholas.hoath at intel.com>

> ---
>   drivers/gpu/drm/i915/i915_reg.h |  3 +++
>   drivers/gpu/drm/i915/intel_pm.c | 11 +++++++++++
>   2 files changed, 14 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index cb66c8f..2043e82 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5275,6 +5275,9 @@ enum skl_disp_power_wells {
>   #define HSW_SCRATCH1				0xb038
>   #define  HSW_SCRATCH1_L3_DATA_ATOMICS_DISABLE	(1<<27)
>
> +#define BDW_SCRATCH1					0xb11c
> +#define  GEN9_LBS_SLA_RETRY_TIMER_DECREMENT_ENABLE	(1<<2)
> +
>   /* PCH */
>
>   /* south display engine interrupt: IBX */
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 2c66423..ed029e7 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -52,10 +52,21 @@
>   #define INTEL_RC6p_ENABLE			(1<<1)
>   #define INTEL_RC6pp_ENABLE			(1<<2)
>
> +static void gen9_init_clock_gating(struct drm_device *dev)
> +{
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +
> +	/* WaEnableLbsSlaRetryTimerDecrement:skl */
> +	I915_WRITE(BDW_SCRATCH1, I915_READ(BDW_SCRATCH1) |
> +		   GEN9_LBS_SLA_RETRY_TIMER_DECREMENT_ENABLE);
> +}
> +
>   static void skl_init_clock_gating(struct drm_device *dev)
>   {
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>
> +	gen9_init_clock_gating(dev);
> +
>   	if (INTEL_REVID(dev) == SKL_REVID_A0) {
>   		/*
>   		 * WaDisableSDEUnitClockGating:skl
>



More information about the Intel-gfx mailing list