[Intel-gfx] [PATCH 2/7] drm/i915/skl: Updated the gen6_set_rps function

[Damien Lespiau]

On Tue, Feb 17, 2015 at 02:31:08PM +0000, Damien Lespiau wrote:
> On Fri, Feb 06, 2015 at 08:26:33PM +0530, akash.goel at intel.com wrote:
> > From: Akash Goel <akash.goel at intel.com>
> > 
> > On SKL, the frequency programmed in RPNSWREQ (A008) register
> > has to be in units of 16.66 MHZ. So updated the gen6_set_rps
> > function, as per this change.
> > 
> > Signed-off-by: Akash Goel <akash.goel at intel.com>
> > ---
> 
> Right, we suppose here that val in in 16.66 Mhz units. At the very least
> we need update the trace point:
> 
>   trace_intel_gpu_freq_change(val * 50);
> 
> Then val is passed to gen6_rps_limits(). The values of 0xA014 are also
> in 16.66 Mhz units, so that part is fine, but the fields of that
> register have changed a bit so we also need to update gen6_rps_limits()
> for gen9 (if not done by a later patch).

I managed to get quite confused, I blame the lack of sleep. From
RP_STATE_CAP, we get all the limits in 50Mhz and we store them like
this. So everything is done in units of 50Mhz and then converted to
units of 16.66Mhz at write time. Took me the whole series to realize
that, sorry.

So:

Reviewed-by: Damien Lespiau <damien.lespiau at intel.com>

-- 
Damien