[Intel-gfx] [PATCH 0/3] drm/i915: Further Skylake h/w w/a's

[Nick Hoath]

Nick Hoath (3):
  drm/i915: gen 9 h/w w/a (Wa32bitGeneralStateOffset &
    Wa32bitInstructionBaseOffset)
  drm/i915: gen 9 h/w w/a (WaDisablePooledEuLoadBalancingFix)    
    Signed-off-by: Nick Hoath <nicholas.hoath at intel.com>
  gen 9 h/w w/a (WaClearFlowControlGpgpuContextSave)     Signed-off-by:
    Nick Hoath <nicholas.hoath at intel.com>

 drivers/gpu/drm/i915/i915_dma.c         |  4 +++-
 drivers/gpu/drm/i915/i915_gem.c         |  4 +++-
 drivers/gpu/drm/i915/i915_reg.h         |  4 ++++
 drivers/gpu/drm/i915/intel_pm.c         | 10 ++++++++++
 drivers/gpu/drm/i915/intel_ringbuffer.c |  2 ++
 5 files changed, 22 insertions(+), 2 deletions(-)

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2.1.1