[Intel-gfx] [PATCH 3/5] drm/i915: Trim the command parser allocations

Daniel Vetter daniel at ffwll.ch
Mon Feb 23 08:09:49 PST 2015


On Fri, Feb 13, 2015 at 04:43:22PM +0000, John Harrison wrote:
> On 13/02/2015 13:23, Chris Wilson wrote:
> >On Fri, Feb 13, 2015 at 01:08:59PM +0000, John Harrison wrote:
> >>>@@ -1155,40 +1154,30 @@ i915_gem_execbuffer_parse(struct intel_engine_cs *ring,
> >>>  			      batch_start_offset,
> >>>  			      batch_len,
> >>>  			      is_master);
> >>>-	if (ret) {
> >>>-		if (ret == -EACCES)
> >>>-			return batch_obj;
> >>>-	} else {
> >>>-		struct i915_vma *vma;
> >>>+	if (ret)
> >>>+		goto err;
> >>>-		memset(shadow_exec_entry, 0, sizeof(*shadow_exec_entry));
> >>>+	ret = i915_gem_obj_ggtt_pin(shadow_batch_obj, 0, 0);
> >>There is no explicit unpin for this. Does it happen automatically
> >>due to adding the vma to the eb->vmas list?
> >We set the exec_flag that tells us to unpin the obj when unwinding the
> >execbuf.
> >>Also, does it matter that it will be pinned again (and explicitly
> >>unpinned) if the SECURE flag is set?
> >No, pin/unpin is just a counter, it just needs to be balanced. (Long
> >answer, yes, the restrictions given to both pin requests much match or
> >else we will attempt to repin the buffer and fail miserably as the
> >object is already pinned.)
> >-Chris
> >
> 
> Reviewed-by: John Harrison <John.C.Harrison at Intel.com>

Queued for -next, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch


More information about the Intel-gfx mailing list