[Intel-gfx] [PATCH 3/3] gen 9 h/w w/a (WaClearFlowControlGpgpuContextSave)

Daniel Vetter daniel at ffwll.ch
Mon Feb 23 15:36:26 PST 2015


On Wed, Feb 18, 2015 at 06:48:11PM +0000, Damien Lespiau wrote:
> On Wed, Feb 18, 2015 at 03:16:08PM +0000, Nick Hoath wrote:
> > Signed-off-by: Nick Hoath <nicholas.hoath at intel.com>
> 
> Can you please prefix subjects by drm/i915/skl or drm/i915/gen9? that
> helps people doing selective backports. In any case, we at least use
> drm/i915 as prefixes, not empty like here :).
> 
> While you're enabling the write to SP here, are the second part of the
> W/A (setting it to 0) done in the shader? As always the
> documentation/bug report are very thin...

If there's a part to be done in shaders we need to audit rendercpy, mesa,
libva, ddx and everything else too ... Please cc relevant
lists/maintainers for the next iteration.

Thanks, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch


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