[Intel-gfx] [PATCH 3/7] drm/i915/skl: Adjust intel_fb_align_height() for Yb/Yf tiling

Damien Lespiau damien.lespiau at intel.com
Wed Feb 25 07:20:10 PST 2015


On Wed, Feb 25, 2015 at 02:00:18PM +0000, Damien Lespiau wrote:
> > It's either square or 2:1 rectangular. I'll try to double check the numbers
> > for 64bpp then.
> 
> Thanks. Thinking about it a bit more, it could just be that the display
> engine has a slightly stricter constraint than the 3D pipeline for the
> alignment of 64bpc fbs. And so the code would be fine. It's all
> assumptions though.

Given that it could be just that and we're doing things as they are
documented, you can add my:

Reviewed-by: Damien Lespiau <damien.lespiau at intel.com>

-- 
Damien


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