[Intel-gfx] [PATCH] drm/i915: RMW register cycles considered evil

[shuang.he at intel.com]

Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he at intel.com)
Task id: 6729
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
ILK                 -1              302/302              301/302
SNB                                  312/316              312/316
IVB                                  345/345              345/345
BYT                 -3              289/289              286/289
HSW                                  382/382              382/382
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*ILK  igt at gem_reloc_vs_gpu@forked-interruptible-thrashing      PASS(1)      DMESG_WARN(1)
(dmesg patch applied)drm:i915_hangcheck_elapsed[i915]]*ERROR*Hangcheck_timer_elapsed...bsd_ring_idle at Hangcheck timer elapsed... bsd ring idle
*BYT  igt at gem_partial_pwrite_pread@reads      PASS(1)      FAIL(1)
*BYT  igt at gem_partial_pwrite_pread@reads-display      PASS(1)      FAIL(1)
*BYT  igt at gem_partial_pwrite_pread@reads-uncached      PASS(1)      FAIL(1)
Note: You need to pay more attention to line start with '*'