[Intel-gfx] [RFC 03/11] drm/i915: Add reset stats entry point for per-engine reset.

Tomas Elf tomas.elf at intel.com
Mon Jun 8 10:03:21 PDT 2015


In preparation for per-engine reset add way for setting context reset stats.

OPEN QUESTIONS:
1. How do we deal with get_reset_stats and the GL robustness interface when
introducing per-engine resets?

	a. Do we set context that cause per-engine resets as guilty? If so, how
	does this affect context banning?

	b. Do we extend the publically available reset stats to also contain
	per-engine reset statistics? If so, would this break the ABI?

Signed-off-by: Tomas Elf <tomas.elf at intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h |    2 ++
 drivers/gpu/drm/i915/i915_gem.c |   14 ++++++++++++++
 2 files changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 47be4a5..ab5dfdc 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2781,6 +2781,8 @@ static inline bool i915_stop_ring_allow_warn(struct drm_i915_private *dev_priv)
 }
 
 void i915_gem_reset(struct drm_device *dev);
+void i915_gem_reset_engine(struct drm_i915_private *dev_priv,
+			   struct intel_engine_cs *engine);
 bool i915_gem_clflush_object(struct drm_i915_gem_object *obj, bool force);
 int __must_check i915_gem_object_finish_gpu(struct drm_i915_gem_object *obj);
 int __must_check i915_gem_init(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 8ce363a..4c88e5c 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2676,6 +2676,20 @@ void i915_gem_reset(struct drm_device *dev)
 	i915_gem_restore_fences(dev);
 }
 
+void i915_gem_reset_engine(struct drm_i915_private *dev_priv,
+			   struct intel_engine_cs *engine)
+{
+	u32 completed_seqno;
+	struct drm_i915_gem_request *req;
+
+	completed_seqno = engine->get_seqno(engine, false);
+
+	/* Find pending batch buffers and mark them as such  */
+	list_for_each_entry(req, &engine->request_list, list)
+	        if (req && (req->seqno > completed_seqno))
+	                i915_set_reset_status(dev_priv, req->ctx, false);
+}
+
 /**
  * This function clears the request list as sequence numbers are passed.
  */
-- 
1.7.9.5



More information about the Intel-gfx mailing list