[Intel-gfx] [PATCH v4 3/6] drm/i915/gen8: Add WaDisableCtxRestoreArbitration workaround

[Arun Siluvery]

In Indirect and Per context w/a batch buffer,
+WaDisableCtxRestoreArbitration

Signed-off-by: Rafael Barbalho <rafael.barbalho at intel.com>
Signed-off-by: Arun Siluvery <arun.siluvery at linux.intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c | 18 ++++++++----------
 1 file changed, 8 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index dcc3f2e..c9875f6 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1091,10 +1091,11 @@ static int gen8_init_indirectctx_bb(struct intel_engine_cs *ring,
 
 	index = offset;
 
-	/* FIXME: fill one cacheline with NOOPs.
-	 * Replace these instructions with WA
-	 */
-	while (index < (offset + 16))
+	/* WaDisableCtxRestoreArbitration:bdw,chv */
+	cmd[index++] = MI_ARB_ON_OFF | MI_ARB_DISABLE;
+
+	/* padding */
+        while (((unsigned long) (cmd + index) % CACHELINE_BYTES) != 0)
 		cmd[index++] = MI_NOOP;
 
 	/*
@@ -1126,13 +1127,10 @@ static int gen8_init_perctx_bb(struct intel_engine_cs *ring,
 
 	index = offset;
 
-	/* FIXME: fill one cacheline with NOOPs.
-	 * Replace these instructions with WA
-	 */
-	while (index < (offset + 16))
-		cmd[index++] = MI_NOOP;
+	/* WaDisableCtxRestoreArbitration:bdw,chv */
+	cmd[index++] = MI_ARB_ON_OFF | MI_ARB_ENABLE;
 
-	cmd[index - 1] = MI_BATCH_BUFFER_END;
+	cmd[index++] = MI_BATCH_BUFFER_END;
 
 	kunmap_atomic(cmd);
 
-- 
2.3.0