[Intel-gfx] [PATCH v6 2/6] drm/i915/gen8: Re-order init pipe_control in lrc mode

[Chris Wilson]

On Fri, Jun 19, 2015 at 06:37:11PM +0100, Arun Siluvery wrote:
> Some of the WA applied using WA batch buffers perform writes to scratch page.
> In the current flow WA are initialized before scratch obj is allocated.
> This patch reorders intel_init_pipe_control() to have a valid scratch obj
> before we initialize WA.
> 
> v2: Check for valid scratch page before initializing WA as some of them
> perform writes to it.
> 
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Dave Gordon <david.s.gordon at intel.com>
> Signed-off-by: Michel Thierry <michel.thierry at intel.com>
> Signed-off-by: Arun Siluvery <arun.siluvery at linux.intel.com>

Ok, I'm not completely happy with the sequence of this, but it works.

logical_ring_init() is the beast that initialises the intel_engine_cs,
and it looks dubious to be setting fields (like dev and scratch_obj)
before we do the main initialisation. I don't have a pretty solution
(thinking of passing around the scratch object, or reordering everything
still further with resulting code duplication for the other rings).

Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre