[Intel-gfx] [PATCH v3 1/3] drm/i915: Expose I915_EXEC_RESOURCE_STREAMER flag

Daniel Vetter daniel at ffwll.ch
Mon May 18 02:01:46 PDT 2015


On Mon, May 18, 2015 at 11:31:54AM +0300, Abdiel Janulgue wrote:
> Ensures that the batch buffer is executed by the resource streamer
> 
> Signed-off-by: Abdiel Janulgue <abdiel.janulgue at linux.intel.com>

Maybe I missed them, but we also need a patch to update gem_exec_params
from igt.  At least the invalid-flag subtest should fail with this
applied. Also please add a Testcase: tag once you've added the testcase
for this new flag.
-Daniel

> ---
>  drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 +++++++++++++++
>  drivers/gpu/drm/i915/intel_ringbuffer.h    |  1 +
>  include/uapi/drm/i915_drm.h                |  7 ++++++-
>  3 files changed, 22 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index a3190e79..8a0abbb 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1485,6 +1485,21 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
>  		return -EINVAL;
>  	}
>  
> +	if (args->flags & I915_EXEC_RESOURCE_STREAMER) {
> +		if (!IS_HASWELL(dev) && INTEL_INFO(dev)->gen < 8) {
> +			DRM_DEBUG("RS is only allowed for Haswell, Gen8 "
> +				  "and above\n");
> +			return -EINVAL;
> +		}
> +		if (ring->id != RCS) {
> +			DRM_DEBUG("RS is not available on %s\n",
> +				 ring->name);
> +			return -EINVAL;
> +		}
> +
> +		dispatch_flags |= I915_DISPATCH_RS;
> +	}
> +
>  	intel_runtime_pm_get(dev_priv);
>  
>  	ret = i915_mutex_lock_interruptible(dev);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index c761fe0..3521bc0 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -167,6 +167,7 @@ struct  intel_engine_cs {
>  					       unsigned dispatch_flags);
>  #define I915_DISPATCH_SECURE 0x1
>  #define I915_DISPATCH_PINNED 0x2
> +#define I915_DISPATCH_RS     0x4
>  	void		(*cleanup)(struct intel_engine_cs *ring);
>  
>  	/* GEN8 signal/wait table - never trust comments!
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 551b673..a4c1a5c 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -760,7 +760,12 @@ struct drm_i915_gem_execbuffer2 {
>  #define I915_EXEC_BSD_RING1		(1<<13)
>  #define I915_EXEC_BSD_RING2		(2<<13)
>  
> -#define __I915_EXEC_UNKNOWN_FLAGS -(1<<15)
> +/** Tell the kernel that the batchbuffer is processed by
> + *  the resource streamer.
> + */
> +#define I915_EXEC_RESOURCE_STREAMER     (1<<16)
> +
> +#define __I915_EXEC_UNKNOWN_FLAGS -(I915_EXEC_RESOURCE_STREAMER <<1)
>  
>  #define I915_EXEC_CONTEXT_ID_MASK	(0xffffffff)
>  #define i915_execbuffer2_set_context_id(eb2, context) \
> -- 
> 1.9.1
> 
> _______________________________________________
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> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch


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