[Intel-gfx] [PATCH 2/2] drm/i915: Let hardware keep track of ctx buf read pointer

[Mika Kuoppala]

We initialize the internal read pointer to zero on init/reset,
but only the reset will actually zero the write pointer.
This means that on module reload we might re-read context
status buffers that were written prior reload.

It is safest just to let the hardware keep track of the read pointer,
so that we get valid value as there is no driver state involved.

Signed-off-by: Mika Kuoppala <mika.kuoppala at intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c     |  6 +++---
 drivers/gpu/drm/i915/intel_lrc.c        | 11 ++++-------
 drivers/gpu/drm/i915/intel_ringbuffer.h |  2 +-
 3 files changed, 8 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index fece922..b079dd3 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2026,8 +2026,8 @@ static int i915_execlists(struct seq_file *m, void *data)
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_engine_cs *ring;
 	u32 status_pointer;
-	u8 read_pointer;
-	u8 write_pointer;
+	u32 read_pointer;
+	u32 write_pointer;
 	u32 status;
 	u32 ctx_id;
 	struct list_head *cursor;
@@ -2060,7 +2060,7 @@ static int i915_execlists(struct seq_file *m, void *data)
 		status_pointer = I915_READ(RING_CONTEXT_STATUS_PTR(ring));
 		seq_printf(m, "\tStatus pointer: 0x%08X\n", status_pointer);
 
-		read_pointer = ring->next_context_status_buffer;
+		read_pointer = (status_pointer >> 8) & 0x07;
 		write_pointer = status_pointer & 0x07;
 		if (read_pointer > write_pointer)
 			write_pointer += 6;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 14dec0d..f03e81f 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -494,15 +494,15 @@ void intel_lrc_irq_handler(struct intel_engine_cs *ring)
 {
 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
 	u32 status_pointer;
-	u8 read_pointer;
-	u8 write_pointer;
+	u32 read_pointer;
+	u32 write_pointer;
 	u32 status;
 	u32 status_id;
 	u32 submit_contexts = 0;
 
 	status_pointer = I915_READ(RING_CONTEXT_STATUS_PTR(ring));
 
-	read_pointer = ring->next_context_status_buffer;
+	read_pointer = (status_pointer >> 8) & 0x07;
 	write_pointer = status_pointer & 0x07;
 	if (read_pointer > write_pointer)
 		write_pointer += 6;
@@ -537,11 +537,9 @@ void intel_lrc_irq_handler(struct intel_engine_cs *ring)
 	spin_unlock(&ring->execlist_lock);
 
 	WARN(submit_contexts > 2, "More than two context complete events?\n");
-	ring->next_context_status_buffer = write_pointer % 6;
 
 	I915_WRITE(RING_CONTEXT_STATUS_PTR(ring),
-		   _MASKED_FIELD(0x07 << 8,
-				 ((u32)ring->next_context_status_buffer & 0x07) << 8));
+		   _MASKED_FIELD(0x07 << 8, (write_pointer % 6) << 8));
 }
 
 static int execlists_context_queue(struct intel_engine_cs *ring,
@@ -1090,7 +1088,6 @@ static int gen8_init_common_ring(struct intel_engine_cs *ring)
 		   _MASKED_BIT_DISABLE(GFX_REPLAY_MODE) |
 		   _MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE));
 	POSTING_READ(RING_MODE_GEN7(ring));
-	ring->next_context_status_buffer = 0;
 	DRM_DEBUG_DRIVER("Execlists enabled for %s\n", ring->name);
 
 	memset(&ring->hangcheck, 0, sizeof(ring->hangcheck));
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 39f6dfc..400d69f 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -240,7 +240,7 @@ struct  intel_engine_cs {
 	spinlock_t execlist_lock;
 	struct list_head execlist_queue;
 	struct list_head execlist_retired_req_list;
-	u8 next_context_status_buffer;
+
 	u32             irq_keep_mask; /* bitmask for interrupts that should not be masked */
 	int		(*emit_request)(struct intel_ringbuffer *ringbuf,
 					struct drm_i915_gem_request *request);
-- 
1.9.1