[Intel-gfx] [PATCH 0/3] drm/i915: CHV DPIO and PFI stuff

ville.syrjala at linux.intel.com ville.syrjala at linux.intel.com
Tue May 26 10:22:37 PDT 2015


From: Ville Syrjälä <ville.syrjala at linux.intel.com>

The two DPIO patches here were part of my DPIO powergating series, but as the
actualy DPIO powergating needs further work I've left that particular patch
behind for now. These other two are good to go without it however so here they 
are. I clarified the pipe-a power well comment a bit for Deepak, and I decided
to rename it to "display" to make dmesg less confusing for people.

The PFI credit thing I've had around for a while, just forgot to send it out.

Ville Syrjälä (3):
  drm/i915: Use the default 600ns LDO programming sequence delay
  drm/i915: Throw out WIP CHV power well definitions
  drm/i915: Bump CHV PFI credits to 63 when cdclk>=czclk

 drivers/gpu/drm/i915/i915_reg.h         |   8 +--
 drivers/gpu/drm/i915/intel_display.c    |   2 +-
 drivers/gpu/drm/i915/intel_runtime_pm.c | 100 ++------------------------------
 3 files changed, 11 insertions(+), 99 deletions(-)

-- 
2.3.6



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