[Intel-gfx] [PATCH 2/2] drm/i915: Perform dpll commit first.

Ander Conselvan De Oliveira conselvan2 at gmail.com
Thu Nov 26 06:41:49 PST 2015


On Tue, 2015-11-24 at 10:44 +0100, Maarten Lankhorst wrote:
> Warn for the wrong mask in enable only. Disable will have the wrong mask
> now because the new state is committed before disabling the old state.

Why?

Ander

> Signed-off-by: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 10 +++-------
>  1 file changed, 3 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 79bb22ef67dc..3eb51195da72 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1897,7 +1897,7 @@ static void intel_enable_shared_dpll(struct intel_crtc
> *crtc)
>  	if (WARN_ON(pll == NULL))
>  		return;
>  
> -	if (WARN_ON(pll->config.crtc_mask == 0))
> +	if (WARN_ON(!(pll->config.crtc_mask & (1 << drm_crtc_index(&crtc
> ->base)))))
>  		return;
>  
>  	if (WARN_ON(pll->active_mask & crtc_mask))
> @@ -1937,9 +1937,6 @@ static void intel_disable_shared_dpll(struct intel_crtc
> *crtc)
>  	if (pll == NULL)
>  		return;
>  
> -	if (WARN_ON(!(pll->config.crtc_mask & crtc_mask)))
> -		return;
> -
>  	if (WARN_ON(!(pll->active_mask & crtc_mask)))
>  		return;
>  
> @@ -13382,7 +13379,8 @@ static int intel_atomic_commit(struct drm_device *dev,
>  	}
>  
>  	drm_atomic_helper_swap_state(dev, state);
> -	dev_priv->wm.config = to_intel_atomic_state(state)->wm_config;
> +	dev_priv->wm.config = intel_state->wm_config;
> +	intel_shared_dpll_commit(state);
>  
>  	if (intel_state->modeset) {
>  		memcpy(dev_priv->min_pixclk, intel_state->min_pixclk,
> @@ -13415,8 +13413,6 @@ static int intel_atomic_commit(struct drm_device *dev,
>  	intel_modeset_update_crtc_state(state);
>  
>  	if (intel_state->modeset) {
> -		intel_shared_dpll_commit(state);
> -
>  		drm_atomic_helper_update_legacy_modeset_state(state->dev,
> state);
>  		modeset_update_crtc_power_domains(state);
>  	}


More information about the Intel-gfx mailing list