[Intel-gfx] [PATCH 1/2] drm/i915: refactor transcoders reporting on error state

Kahola, Mika mika.kahola at intel.com
Mon Mar 4 12:38:30 UTC 2019


Looks ok.

On Fri, 2019-02-22 at 15:02 -0800, Lucas De Marchi wrote:
> Instead of keeping track of the number of transcoders, loop through
> all
> the interesting ones and check if there is a correspondent offset.
> 
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>

Reviewed-by: Mika Kahola <mika.kahola at intel.com>

> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 21 ++++++++++++---------
>  1 file changed, 12 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index b1d63c32ca94..9dfb99195144 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -16374,8 +16374,6 @@ struct intel_display_error_state {
>  
>  	u32 power_well_driver;
>  
> -	int num_transcoders;
> -
>  	struct intel_cursor_error_state {
>  		u32 control;
>  		u32 position;
> @@ -16400,6 +16398,7 @@ struct intel_display_error_state {
>  	} plane[I915_MAX_PIPES];
>  
>  	struct intel_transcoder_error_state {
> +		bool available;
>  		bool power_domain_on;
>  		enum transcoder cpu_transcoder;
>  
> @@ -16426,6 +16425,8 @@ intel_display_capture_error_state(struct
> drm_i915_private *dev_priv)
>  	};
>  	int i;
>  
> +	BUILD_BUG_ON(ARRAY_SIZE(transcoders) != ARRAY_SIZE(error-
> >transcoder));
> +
>  	if (!HAS_DISPLAY(dev_priv))
>  		return NULL;
>  
> @@ -16466,14 +16467,13 @@ intel_display_capture_error_state(struct
> drm_i915_private *dev_priv)
>  			error->pipe[i].stat = I915_READ(PIPESTAT(i));
>  	}
>  
> -	/* Note: this does not include DSI transcoders. */
> -	error->num_transcoders = INTEL_INFO(dev_priv)->num_pipes;
> -	if (HAS_DDI(dev_priv))
> -		error->num_transcoders++; /* Account for eDP. */
> -
> -	for (i = 0; i < error->num_transcoders; i++) {
> +	for (i = 0; i < ARRAY_SIZE(error->transcoder); i++) {
>  		enum transcoder cpu_transcoder = transcoders[i];
>  
> +		if (!INTEL_INFO(dev_priv)-
> >trans_offsets[cpu_transcoder])
> +			continue;
> +
> +		error->transcoder[i].available = true;
>  		error->transcoder[i].power_domain_on =
>  			__intel_display_power_is_enabled(dev_priv,
>  				POWER_DOMAIN_TRANSCODER(cpu_transcoder)
> );
> @@ -16537,7 +16537,10 @@ intel_display_print_error_state(struct
> drm_i915_error_state_buf *m,
>  		err_printf(m, "  BASE: %08x\n", error->cursor[i].base);
>  	}
>  
> -	for (i = 0; i < error->num_transcoders; i++) {
> +	for (i = 0; i < ARRAY_SIZE(error->transcoder); i++) {
> +		if (!error->transcoder[i].available)
> +			continue;
> +
>  		err_printf(m, "CPU transcoder: %s\n",
>  			   transcoder_name(error-
> >transcoder[i].cpu_transcoder));
>  		err_printf(m, "  Power: %s\n",


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