[Intel-gfx] [PATCH 3/3] drm/i915: Start using comparative INTEL_PCH_TYPE

Lucas De Marchi lucas.demarchi at intel.com
Wed Mar 13 17:30:52 UTC 2019


On Fri, Mar 08, 2019 at 01:43:00PM -0800, Rodrigo Vivi wrote:
>In order to make it easier to bring up new platforms
>without having to take care about all corner cases
>that was previously taken care for previous platforms
>we already use comparative INTEL_GEN statements.
>
>Let's start doing the same with PCH.
>
>The only caveats are:
> - less-than comparisons need to be avoided or done with
>   attention and check > PCH_NONE as well.
> - It is not necessarily a chronological order, but a matter
>   of south display compatibility/inheritance.
>
>v2: Rebased on top of Jani's clean-up which removed the
>    need for less-than comparison
>
>Cc: Jani Nikula <jani.nikula at intel.com>
>Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
>Cc: Lucas De Marchi <lucas.demarchi at intel.com>
>Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>


Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>

thanks
Lucas De Marchi


>---
> drivers/gpu/drm/i915/i915_drv.h    | 6 ++++++
> drivers/gpu/drm/i915/i915_irq.c    | 7 ++-----
> drivers/gpu/drm/i915/intel_cdclk.c | 2 +-
> drivers/gpu/drm/i915/intel_dp.c    | 3 +--
> drivers/gpu/drm/i915/intel_panel.c | 5 ++---
> 5 files changed, 12 insertions(+), 11 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>index 8a57cdde5385..9a93accbb2e1 100644
>--- a/drivers/gpu/drm/i915/i915_drv.h
>+++ b/drivers/gpu/drm/i915/i915_drv.h
>@@ -523,6 +523,12 @@ struct i915_psr {
> 	u16 su_x_granularity;
> };
>
>+/*
>+ * Sorted by south display engine compatibility.
>+ * If the new PCH comes with a south display engine that is not
>+ * inherited from the latest item, please do not add it to the
>+ * end. Instead, add it right after its "parent" PCH.
>+ */
> enum intel_pch {
> 	PCH_NOP = -1,	/* PCH without south display */
> 	PCH_NONE = 0,	/* No PCH present */
>diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>index 1f4e984ce42f..c823d2e76852 100644
>--- a/drivers/gpu/drm/i915/i915_irq.c
>+++ b/drivers/gpu/drm/i915/i915_irq.c
>@@ -2831,9 +2831,7 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
>
> 			if (HAS_PCH_ICP(dev_priv))
> 				icp_irq_handler(dev_priv, iir);
>-			else if (HAS_PCH_SPT(dev_priv) ||
>-				 HAS_PCH_KBP(dev_priv) ||
>-				 HAS_PCH_CNP(dev_priv))
>+			else if (INTEL_PCH_TYPE(dev_priv) >= PCH_SPT)
> 				spt_irq_handler(dev_priv, iir);
> 			else
> 				cpt_irq_handler(dev_priv, iir);
>@@ -4621,8 +4619,7 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
> 		dev->driver->disable_vblank = gen8_disable_vblank;
> 		if (IS_GEN9_LP(dev_priv))
> 			dev_priv->display.hpd_irq_setup = bxt_hpd_irq_setup;
>-		else if (HAS_PCH_SPT(dev_priv) || HAS_PCH_KBP(dev_priv) ||
>-			 HAS_PCH_CNP(dev_priv))
>+		else if (INTEL_PCH_TYPE(dev_priv) >= PCH_SPT)
> 			dev_priv->display.hpd_irq_setup = spt_hpd_irq_setup;
> 		else
> 			dev_priv->display.hpd_irq_setup = ilk_hpd_irq_setup;
>diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
>index 7e5132772477..9d236e4ed26a 100644
>--- a/drivers/gpu/drm/i915/intel_cdclk.c
>+++ b/drivers/gpu/drm/i915/intel_cdclk.c
>@@ -2723,7 +2723,7 @@ static int g4x_hrawclk(struct drm_i915_private *dev_priv)
>  */
> void intel_update_rawclk(struct drm_i915_private *dev_priv)
> {
>-	if (HAS_PCH_CNP(dev_priv) || HAS_PCH_ICP(dev_priv))
>+	if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP)
> 		dev_priv->rawclk_freq = cnp_rawclk(dev_priv);
> 	else if (HAS_PCH_SPLIT(dev_priv))
> 		dev_priv->rawclk_freq = pch_rawclk(dev_priv);
>diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
>index f40b3342d82a..47857f96c3b1 100644
>--- a/drivers/gpu/drm/i915/intel_dp.c
>+++ b/drivers/gpu/drm/i915/intel_dp.c
>@@ -951,8 +951,7 @@ static void intel_pps_get_registers(struct intel_dp *intel_dp,
> 	regs->pp_off = PP_OFF_DELAYS(pps_idx);
>
> 	/* Cycle delay moved from PP_DIVISOR to PP_CONTROL */
>-	if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv) ||
>-	    HAS_PCH_ICP(dev_priv))
>+	if (IS_GEN9_LP(dev_priv) || INTEL_PCH_TYPE(dev_priv) >= PCH_CNP)
> 		regs->pp_div = INVALID_MMIO_REG;
> 	else
> 		regs->pp_div = PP_DIVISOR(pps_idx);
>diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
>index beca98d2b035..edd5540639b0 100644
>--- a/drivers/gpu/drm/i915/intel_panel.c
>+++ b/drivers/gpu/drm/i915/intel_panel.c
>@@ -1894,15 +1894,14 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel)
> 		panel->backlight.set = bxt_set_backlight;
> 		panel->backlight.get = bxt_get_backlight;
> 		panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
>-	} else if (HAS_PCH_CNP(dev_priv) || HAS_PCH_ICP(dev_priv)) {
>+	} else if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP) {
> 		panel->backlight.setup = cnp_setup_backlight;
> 		panel->backlight.enable = cnp_enable_backlight;
> 		panel->backlight.disable = cnp_disable_backlight;
> 		panel->backlight.set = bxt_set_backlight;
> 		panel->backlight.get = bxt_get_backlight;
> 		panel->backlight.hz_to_pwm = cnp_hz_to_pwm;
>-	} else if (HAS_PCH_LPT(dev_priv) || HAS_PCH_SPT(dev_priv) ||
>-		   HAS_PCH_KBP(dev_priv)) {
>+	} else if (INTEL_PCH_TYPE(dev_priv) >= PCH_LPT) {
> 		panel->backlight.setup = lpt_setup_backlight;
> 		panel->backlight.enable = lpt_enable_backlight;
> 		panel->backlight.disable = lpt_disable_backlight;
>-- 
>2.20.1
>


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