[Intel-gfx] [PATCH] drm/i915: Use __is_constexpr()

Randy Dunlap rdunlap at infradead.org
Wed Mar 20 16:05:57 UTC 2019


On 3/20/19 8:40 AM, Chris Wilson wrote:
> gcc-4.8 and older dislike the use of __builtin_constant_p() within a
> constant expression context, and so we must use the magical
> __is_constexpr() instead.
> 
> For example, with gcc-4.8.5:
> ../drivers/gpu/drm/i915/i915_reg.h:167:27: error: first argument to ‘__builtin_choose_expr’ not a constant
> ../include/linux/build_bug.h:16:45: error: bit-field ‘<anonymous>’ width not an integer constant
> 
> Reported-by: Randy Dunlap <rdunlap at infradead.org>
> Fixes: baa09e7d2f42 ("drm/i915: use REG_FIELD_PREP() to define register bitfield values")
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Jani Nikula <jani.nikula at intel.com>
> Cc: Imre Deak <imre.deak at intel.com>
> Cc: Randy Dunlap <rdunlap at infradead.org>

Acked-by: Randy Dunlap <rdunlap at infradead.org> # build-tested

Thanks.

> ---
>  drivers/gpu/drm/i915/i915_reg.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 85e8d1a1f70b..50d0b2ae89eb 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -161,10 +161,10 @@
>   */
>  #define REG_FIELD_PREP(__mask, __val)						\
>  	((u32)((((typeof(__mask))(__val) << __bf_shf(__mask)) & (__mask)) +	\
> -	       BUILD_BUG_ON_ZERO(!__builtin_constant_p(__mask)) +		\
> +	       BUILD_BUG_ON_ZERO(!__is_constexpr(__mask)) +		\
>  	       BUILD_BUG_ON_ZERO((__mask) == 0 || (__mask) > U32_MAX) +		\
>  	       BUILD_BUG_ON_ZERO(!IS_POWER_OF_2((__mask) + (1ULL << __bf_shf(__mask)))) + \
> -	       BUILD_BUG_ON_ZERO(__builtin_choose_expr(__builtin_constant_p(__val), (~((__mask) >> __bf_shf(__mask)) & (__val)), 0))))
> +	       BUILD_BUG_ON_ZERO(__builtin_choose_expr(__is_constexpr(__val), (~((__mask) >> __bf_shf(__mask)) & (__val)), 0))))
>  
>  /**
>   * REG_FIELD_GET() - Extract a u32 bitfield value
> 


-- 
~Randy


More information about the Intel-gfx mailing list