[Intel-gfx] [PATCH 20/30] drm/i915/guc: Make use of the SW counter field in the context descriptor

Chris Wilson chris at chris-wilson.co.uk
Fri Mar 29 22:30:58 UTC 2019


Quoting Michal Wajdeczko (2019-03-29 22:11:08)
> From: Oscar Mateo <oscar.mateo at intel.com>
> 
> The new context descriptor format contains two assignable fields:
> the SW Context ID (technically 11 bits, but practically limited to 2032
> entries due to some being reserved for future use by the GuC) and the
> SW Counter (6 bits).

Phooey, I've dropped use of the hw id. So no limit at all in execlists,
and no contention on pinning the hw id.

We could land that and move this mechanism to the guc backend so that it
doesn't impact anything else.
-Chris


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