Sorry, this is the wrong patch, please disregard.<br><br><div class="gmail_quote">On Tue, Nov 1, 2011 at 6:58 PM, Simon Que <span dir="ltr"><<a href="mailto:sque@chromium.org">sque@chromium.org</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex;">Use 0x1000 as the default backlight PWM max value and period.  This is<br>
passed in as a module parameter to i915_drv and is used to program the<br>
PWM registers.  It can be set to other values based on the needs of each<br>
system.<br>
<br>
Signed-off-by: Simon Que <<a href="mailto:sque@chromium.org">sque@chromium.org</a>><br>
---<br>
 drivers/gpu/drm/i915/i915_reg.h    |    1 +<br>
 drivers/gpu/drm/i915/intel_panel.c |   29 +++++++++++++++++------------<br>
 2 files changed, 18 insertions(+), 12 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h<br>
index 5d5def7..a832028 100644<br>
--- a/drivers/gpu/drm/i915/i915_reg.h<br>
+++ b/drivers/gpu/drm/i915/i915_reg.h<br>
@@ -3275,6 +3275,7 @@<br>
 #define  PWM_POLARITY_ACTIVE_HIGH2     (0 << 28)<br>
<br>
 #define BLC_PWM_PCH_CTL2       0xc8254<br>
+#define BLC_PWM_PCH_FREQ_SHIFT 16<br>
<br>
 #define PCH_PP_STATUS          0xc7200<br>
 #define PCH_PP_CONTROL         0xc7204<br>
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c<br>
index 05f500c..b5d2244 100644<br>
--- a/drivers/gpu/drm/i915/intel_panel.c<br>
+++ b/drivers/gpu/drm/i915/intel_panel.c<br>
@@ -133,27 +133,32 @@ static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv)<br>
 {<br>
        u32 val;<br>
<br>
-       /* Restore the CTL value if it lost, e.g. GPU reset */<br>
-<br>
+       /* Restore the CTL value if it was lost, e.g. GPU reset */<br>
+       /* Use the default PWM max if none is available. */<br>
        if (HAS_PCH_SPLIT(dev_priv->dev)) {<br>
                val = I915_READ(BLC_PWM_PCH_CTL2);<br>
-               if (dev_priv->saveBLC_PWM_CTL2 == 0) {<br>
+               if (dev_priv->saveBLC_PWM_CTL2 == 0 && val == 0)<br>
+                       dev_priv->saveBLC_PWM_CTL2 =<br>
+                               i915_max_backlight << BLC_PWM_PCH_FREQ_SHIFT;<br>
+               else if (dev_priv->saveBLC_PWM_CTL2 == 0)<br>
                        dev_priv->saveBLC_PWM_CTL2 = val;<br>
-               } else if (val == 0) {<br>
+               if (val == 0) {<br>
                        I915_WRITE(BLC_PWM_PCH_CTL2,<br>
-                                  dev_priv->saveBLC_PWM_CTL);<br>
-                       val = dev_priv->saveBLC_PWM_CTL;<br>
+                                  dev_priv->saveBLC_PWM_CTL2);<br>
+                       val = dev_priv->saveBLC_PWM_CTL2;<br>
                }<br>
        } else {<br>
                val = I915_READ(BLC_PWM_CTL);<br>
-               if (dev_priv->saveBLC_PWM_CTL == 0) {<br>
+               if (dev_priv->saveBLC_PWM_CTL == 0 && val == 0) {<br>
+                       dev_priv->saveBLC_PWM_CTL = i915_max_backlight<br>
+                               << BACKLIGHT_MODULATION_FREQ_SHIFT;<br>
+               } else if (dev_priv->saveBLC_PWM_CTL == 0) {<br>
                        dev_priv->saveBLC_PWM_CTL = val;<br>
                        dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2);<br>
-               } else if (val == 0) {<br>
-                       I915_WRITE(BLC_PWM_CTL,<br>
-                                  dev_priv->saveBLC_PWM_CTL);<br>
-                       I915_WRITE(BLC_PWM_CTL2,<br>
-                                  dev_priv->saveBLC_PWM_CTL2);<br>
+               }<br>
+               if (val == 0) {<br>
+                       I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL);<br>
+                       I915_WRITE(BLC_PWM_CTL2, dev_priv->saveBLC_PWM_CTL2);<br>
                        val = dev_priv->saveBLC_PWM_CTL;<br>
                }<br>
        }<br>
<span class="HOEnZb"><font color="#888888">--<br>
1.7.2.3<br>
<br>
</font></span></blockquote></div><br>