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<title>PIPE_CLK_SEL</title>
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<table class="maintable filtered" project="hsw">
<col class="col1" />
<col class="col2" />
<col class="col3" />
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<th colspan="3" id="tabletitle">PIPE_CLK_SEL</th>
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<tr class="filtered" project="hsw">
<td colspan="3">
<table id="infotable" class="filtered" project="hsw">
<col class="col1"/>
<col class="col2"/>
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<td class="infoh">Register Space:</td>
<td>MMIO: 0/2/0</td>
</tr>
<tr>
<td class="infoh">Project:</td>
<td>DevHSW</td>
</tr>
<tr>
<td class="infoh">Source:</td>
<td>BSpec</td>
</tr>
<tr>
<td class="infoh">Default Value:</td>
<td>0x00000000</td>
</tr>
<tr>
<td class="infoh">Access:</td>
<td>R/W</td>
</tr>
<tr>
<td class="infoh">Size (in bits):</td>
<td>32</td>
</tr>
</table>
</td>
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<tr class="filtered" project="hsw">
<td colspan="3">
<table id="infotable" class="filtered" project="hsw">
<col class="col1"/>
<col class="col2"/>
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<td class="infoh">Address:</td>
<td>46140h-46143h</td>
</tr>
<tr>
<td class="infoh">Name:</td>
<td>Pipe A Clock Select</td>
</tr>
<tr>
<td class="infoh">ShortName:</td>
<td>PIPE_CLK_SEL_A</td>
</tr>
<tr>
<td class="infoh">Unit:</td>
<td>dcpr</td>
</tr>
<tr>
<td class="infoh">Custom Display Category:</td>
<td>NDE Clocks</td>
</tr>
<tr>
<td class="infoh">Custom Display FUB:</td>
<td>dcpr</td>
</tr>
<tr>
<td class="infoh">Custom Display Partition:</td>
<td>par1</td>
</tr>
<tr>
<td class="infoh">Power:</td>
<td>Always on</td>
</tr>
<tr>
<td class="infoh">Reset:</td>
<td>soft</td>
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</td>
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<tr class="filtered" project="hsw">
<td colspan="3">
<table id="infotable" class="filtered" project="hsw">
<col class="col1"/>
<col class="col2"/>
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<td class="infoh">Address:</td>
<td>46144h-46147h</td>
</tr>
<tr>
<td class="infoh">Name:</td>
<td>Pipe B Clock Select</td>
</tr>
<tr>
<td class="infoh">ShortName:</td>
<td>PIPE_CLK_SEL_B</td>
</tr>
<tr>
<td class="infoh">Unit:</td>
<td>dcpr</td>
</tr>
<tr>
<td class="infoh">Custom Display Category:</td>
<td>NDE Clocks</td>
</tr>
<tr>
<td class="infoh">Custom Display FUB:</td>
<td>dcpr</td>
</tr>
<tr>
<td class="infoh">Custom Display Partition:</td>
<td>par1</td>
</tr>
<tr>
<td class="infoh">Power:</td>
<td>Always on</td>
</tr>
<tr>
<td class="infoh">Reset:</td>
<td>soft</td>
</tr>
</table>
</td>
</tr>
<tr class="filtered" project="hsw">
<td colspan="3">
<table id="infotable" class="filtered" project="hsw">
<col class="col1"/>
<col class="col2"/>
<tr>
<td class="infoh">Address:</td>
<td>46148h-4614Bh</td>
</tr>
<tr>
<td class="infoh">Name:</td>
<td>Pipe C Clock Select</td>
</tr>
<tr>
<td class="infoh">ShortName:</td>
<td>PIPE_CLK_SEL_C</td>
</tr>
<tr>
<td class="infoh">Unit:</td>
<td>dcpr</td>
</tr>
<tr>
<td class="infoh">Custom Display Category:</td>
<td>NDE Clocks</td>
</tr>
<tr>
<td class="infoh">Custom Display FUB:</td>
<td>dcpr</td>
</tr>
<tr>
<td class="infoh">Custom Display Partition:</td>
<td>par1</td>
</tr>
<tr>
<td class="infoh">Power:</td>
<td>Always on</td>
</tr>
<tr>
<td class="infoh">Reset:</td>
<td>soft</td>
</tr>
</table>
</td>
</tr>
<tr class="filtered" project="hsw">
<td id="maintabledesc" colspan="3">
<span style="white-space: pre-wrap;">This register maps the port clock to the pipe.<br />
There is one instance of this register format per pipe A/B/C.</span>
</td>
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<th class = "maintableheader">DWord</th>
<th class = "maintableheader">Bit</th>
<th class = "maintableheader">Description</th>
</tr>
<tr class="filtered" project="hsw">
<td class="dwordnum" rowspan="2">0 </td>
<td class="bitrange filtered" project="hsw">31:29</td>
<td class="bitfielddesc filtered" project="hsw"><div class="bitfieldname">Pipe Clock Select</div>
<table class="bitfieldtable">
<col class="col1" />
<col class="col2" />
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<span style="white-space: pre-wrap;">Select which PLL to use for this pipe.<br />
Pipe EDP always uses DDIA clock.</span>
<table class="validvaluetable">
<tr>
<th>Value</th>
<th>Name</th>
<th>Description</th>
<th>Project</th>
</tr>
<tr class="filtered" project="hsw">
<td>000b
</td>
<td>None</td>
<td><span style="white-space: pre-wrap;">No PLL selected. Clock is disabled for this transcoder.</span></td>
<td> </td>
</tr>
<tr class="filtered" project="hsw">
<td>010b
</td>
<td>DDIB</td>
<td><span style="white-space: pre-wrap;">Select DDIB clock</span></td>
<td> </td>
</tr>
<tr class="filtered" project="hsw">
<td>011b
</td>
<td>DDIC</td>
<td><span style="white-space: pre-wrap;">Select DDIC clock</span></td>
<td> </td>
</tr>
<tr class="filtered" project="hsw">
<td>100b
</td>
<td>DDID</td>
<td><span style="white-space: pre-wrap;">Select DDID clock</span></td>
<td>DevHSW</td>
</tr>
<tr class="filtered" project="hsw">
<td>100b
</td>
<td>Reserved</td>
<td><span style="white-space: pre-wrap;">Reserved. DDID is not supported for ULT and must not be selected.</span></td>
<td>DevHSW:ULT</td>
</tr>
<tr class="filtered" project="hsw">
<td>101b
</td>
<td>DDIE</td>
<td><span style="white-space: pre-wrap;">Select DDIE clock</span></td>
<td>DevHSW, EXCLUDE(DevHSW:GT0:X0)</td>
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<tr class="filtered" project="hsw">
<td>Others
</td>
<td>Reserved</td>
<td><span style="white-space: pre-wrap;">Reserved</span></td>
<td> </td>
</tr>
</table>
<table class="prognotes">
<col class="col1"/>
<tr>
<th class="col1">Restriction</th>
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<tr class="filtered" project="hsw">
<td><span style="white-space: pre-wrap;">Restriction : This must not be changed while the pipe is enabled.</span></td>
</tr>
</table>
</td>
</tr>
<tr class="filtered" project="hsw">
<td class="bitrange filtered" project="hsw">28:0</td>
<td class="bitfielddesc filtered" project="hsw"><div class="bitfieldname">Reserved</div>
<table class="bitfieldtable">
<col class="col1" />
<col class="col2" />
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</td>
</tr>
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