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cite="mid:20140715074628.GO15237@phenom.ffwll.local" type="cite">
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photoaddress="daniel@ffwll.ch" photoname="Daniel Vetter"
src="cid:part1.00000201.07080008@gmail.com" name="postbox-contact.jpg"
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style="color:#737F92
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<font color="#9FA2A5"><span style="padding-left:6px">Tuesday, July 15,
2014 12:46 AM</span></font></div></div></div>
<div style="color: rgb(136, 136, 136); margin-left: 24px;
margin-right: 24px;" __pbrmquotes="true" class="__pbConvBody"><pre wrap="">On Mon, Jul 14, 2014 at 12:10:47PM -0700, Todd Previte wrote:
</pre><blockquote type="cite"><pre wrap="">The Displayport Link Layer Compliance Testing Specification 1.2 rev 1.1 specifies that
repeated AUX transactions after a failure (NACK, DEFER or no response) must have
a minimum delay of 400us before the resend can occur. Tests 4.2.1.1 and 4.2.1.2 are two
tests that require this specifically.
Signed-off-by: Todd Previte <a class="moz-txt-link-rfc2396E" href="mailto:tprevite@gmail.com"><tprevite@gmail.com></a>
</pre></blockquote><pre wrap=""><!---->
Since this is a minimal timeout ... shouldn't we put it into the dp
helpers instead?
-Daniel</pre></div>
</blockquote>
This delay catches the case where the sink device either does not
respond at all or responds with an invalid AUX transaction. These are
lower level errors than the DRM helper functions are supposed to handle.
<span>I mistakenly mentioned NACK/DEFER in the commit message - that's
not an accurate description of what this patch does. I will fix the
commit message for v3 of this patch. <br>
<br>
</span><br>
-T<br>
<blockquote style="border: 0px none;"
cite="mid:20140715074628.GO15237@phenom.ffwll.local" type="cite">
<div style="color:#888888;margin-left:24px;margin-right:24px;"
__pbrmquotes="true" class="__pbConvBody"><blockquote type="cite">
<pre wrap="">---
drivers/gpu/drm/i915/intel_dp.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 0e207aaf..f0664cd 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -573,8 +573,12 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
DP_AUX_CH_CTL_RECEIVE_ERROR);
if (status & (DP_AUX_CH_CTL_TIME_OUT_ERROR |
- DP_AUX_CH_CTL_RECEIVE_ERROR))
+ DP_AUX_CH_CTL_RECEIVE_ERROR)) {
+ /* DP compliance requires 400us delay for errors/timeouts
+ (DP CTS 1.2 Core Rev 1.1, 4.2.1.1 & 4.2.1.2) */
+ udelay(400);
continue;
+ }
if (status & DP_AUX_CH_CTL_DONE)
break;
}
--
1.9.1
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</pre>
</blockquote><pre wrap=""><!---->
</pre></div>
<div style="margin:30px 25px 10px 25px;" class="__pbConvHr"><div
style="display:table;width:100%;border-top:1px solid
#EDEEF0;padding-top:5px"> <div
style="display:table-cell;vertical-align:middle;padding-right:6px;"><img
photoaddress="tprevite@gmail.com" photoname="Todd Previte"
src="cid:part2.04080504.03010304@gmail.com"
name="compose-unknown-contact.jpg" height="25px" width="25px"></div> <div
style="display:table-cell;white-space:nowrap;vertical-align:middle;width:100%">
<a moz-do-not-send="true" href="mailto:tprevite@gmail.com"
style="color:#737F92
!important;padding-right:6px;font-weight:bold;text-decoration:none
!important;">Todd Previte</a></div> <div
style="display:table-cell;white-space:nowrap;vertical-align:middle;">
<font color="#9FA2A5"><span style="padding-left:6px">Monday, July 14,
2014 12:10 PM</span></font></div></div></div>
<div style="color:#888888;margin-left:24px;margin-right:24px;"
__pbrmquotes="true" class="__pbConvBody"><div>The Displayport Link Layer
Compliance Testing Specification 1.2 rev 1.1 specifies that<br>repeated
AUX transactions after a failure (NACK, DEFER or no response) must have<br>a
minimum delay of 400us before the resend can occur. Tests 4.2.1.1 and
4.2.1.2 are two<br>tests that require this specifically.<br><br>Signed-off-by:
Todd Previte <a class="moz-txt-link-rfc2396E" href="mailto:tprevite@gmail.com"><tprevite@gmail.com></a><br>---<br>
drivers/gpu/drm/i915/intel_dp.c | 6 +++++-<br> 1 file changed, 5
insertions(+), 1 deletion(-)<br><br>diff --git
a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c<br>index
0e207aaf..f0664cd 100644<br>--- a/drivers/gpu/drm/i915/intel_dp.c<br>+++
b/drivers/gpu/drm/i915/intel_dp.c<br>@@ -573,8 +573,12 @@
intel_dp_aux_ch(struct intel_dp *intel_dp,<br>
DP_AUX_CH_CTL_RECEIVE_ERROR);<br> <br> if (status &
(DP_AUX_CH_CTL_TIME_OUT_ERROR |<br>-
DP_AUX_CH_CTL_RECEIVE_ERROR))<br>+
DP_AUX_CH_CTL_RECEIVE_ERROR)) {<br>+ /* DP compliance requires 400us
delay for errors/timeouts<br>+ (DP CTS 1.2 Core Rev 1.1, 4.2.1.1
& 4.2.1.2) */<br>+ udelay(400);<br> continue;<br>+ }<br>
if (status & DP_AUX_CH_CTL_DONE)<br> break;<br> }<br></div></div>
<div style="margin:30px 25px 10px 25px;" class="__pbConvHr"><div
style="display:table;width:100%;border-top:1px solid
#EDEEF0;padding-top:5px"> <div
style="display:table-cell;vertical-align:middle;padding-right:6px;"><img
photoaddress="tprevite@gmail.com" photoname="Todd Previte"
src="cid:part2.04080504.03010304@gmail.com"
name="compose-unknown-contact.jpg" height="25px" width="25px"></div> <div
style="display:table-cell;white-space:nowrap;vertical-align:middle;width:100%">
<a moz-do-not-send="true" href="mailto:tprevite@gmail.com"
style="color:#737F92
!important;padding-right:6px;font-weight:bold;text-decoration:none
!important;">Todd Previte</a></div> <div
style="display:table-cell;white-space:nowrap;vertical-align:middle;">
<font color="#9FA2A5"><span style="padding-left:6px">Monday, July 14,
2014 12:10 PM</span></font></div></div></div>
<div style="color:#888888;margin-left:24px;margin-right:24px;"
__pbrmquotes="true" class="__pbConvBody"><div><!----><br>V2:<br>-
Addressed review feedback from the mailing list<br>- Broke up patches
into smaller, easily managed chunks<br>- Reordered the patches such that
they can be applied in order<br>- Fixed checkpatch.pl errors across the
patchset <br>- Updated and enhanced functionality for the EDID test
function<br>- Completely revamped the mode set operations for compliance
testing<br><br></div></div>
</blockquote>
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