<div dir="ltr"><br><div class="gmail_extra"><br><br><div class="gmail_quote">On Thu, Sep 4, 2014 at 4:04 AM, Daniel Vetter <span dir="ltr"><<a href="mailto:daniel@ffwll.ch" target="_blank">daniel@ffwll.ch</a>></span> wrote:<br> <blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div class="">On Thu, Sep 04, 2014 at 01:18:19PM +0300, Ville Syrjälä wrote:<br> > On Thu, Sep 04, 2014 at 01:04:27PM +0300, Ville Syrjälä wrote:<br> > > On Thu, Sep 04, 2014 at 11:29:16AM +0200, Daniel Vetter wrote:<br> > > > On Thu, Sep 04, 2014 at 10:55:16AM +0300, Ville Syrjälä wrote:<br> > > > > On Wed, Sep 03, 2014 at 10:49:56PM -0400, Rodrigo Vivi wrote:<br> > > > > > With Software tracking we are going to PSR sooner than we should and staying<br> > > > > > with blank screens in many cases.<br> > > > > ><br> > > > > > Using 2 identical frames to detect idleness is safier.<br> > > > ><br> > > > > This idle frame detection still depends of FBC right?<br> > > > ><br> > > > > I believe if we want to go for full sw tracking on HSW/BDW we need to<br> > > > > use the debug register to force PSR entry/exit.<br> > > ><br> > > > Currently the sw tracking relies upon 1 additional full upload happening<br> > > > after the flush, which hopefully should magically happen if we have just 1<br> > > > idle frame.<br> > > ><br> > > > If we'd completely switch to sw tracking we'd need to set up a vblank<br> > > > worker to disable psr after the next vblank, which would comlicate the<br> > > > code I think.<br> > ><br> > > vlv/chv have no hw tracking so if the current sw tracking can't deal<br> > > with that then it would seem to need more work.<br> ><br> > Hmm. Actually they seem to have a hw timer mode where we can program the<br> > number of idle frames. I think idle here means "since the last plane<br> > register frobbing" as there's no real modification tracking ala. FBC.<br> > So maybe it can work roughly the same way as HSW in that regard.<br> <br> </div>Essentially the primitive the current code needs (modulo bugs, which seem<br> to still be) is to "upload one more full frame, then enter psr". If a lot<br> of platforms can't do that themselves I guess we could wrap some helpers<br> for them.<br> <br> But if there's some real sw tracking bug still, and Rodrigo's patch looks<br> like this is still the case, we need to fix that ofc.<br></blockquote><div><br></div><div>Yeah, I agree. But I'm afraid I didn't fully get your idea. What do you have in mind?</div><div><br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"> <span class="HOEnZb"><font color="#888888">-Daniel<br> </font></span><div class="HOEnZb"><div class="h5"><br> ><br> > ><br> > > > -Daniel<br> > > ><br> > > > ><br> > > > > ><br> > > > > > Discovered and validated with refactored igt/kms_sink_psr_crc.<br> > > > > ><br> > > > > > Signed-off-by: Rodrigo Vivi <<a href="mailto:rodrigo.vivi@intel.com">rodrigo.vivi@intel.com</a>><br> > > > > > ---<br> > > > > > drivers/gpu/drm/i915/intel_dp.c | 2 +-<br> > > > > > 1 file changed, 1 insertion(+), 1 deletion(-)<br> > > > > ><br> > > > > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c<br> > > > > > index f79473b..a796831 100644<br> > > > > > --- a/drivers/gpu/drm/i915/intel_dp.c<br> > > > > > +++ b/drivers/gpu/drm/i915/intel_dp.c<br> > > > > > @@ -1813,7 +1813,7 @@ static void intel_edp_psr_enable_source(struct intel_dp *intel_dp)<br> > > > > > struct drm_device *dev = dig_port->base.base.dev;<br> > > > > > struct drm_i915_private *dev_priv = dev->dev_private;<br> > > > > > uint32_t max_sleep_time = 0x1f;<br> > > > > > - uint32_t idle_frames = 1;<br> > > > > > + uint32_t idle_frames = 2;<br> > > > > > uint32_t val = 0x0;<br> > > > > > const uint32_t link_entry_time = EDP_PSR_MIN_LINK_ENTRY_TIME_8_LINES;<br> > > > > > bool only_standby = false;<br> > > > > > --<br> > > > > > 1.9.3<br> > > > > ><br> > > > > > _______________________________________________<br> > > > > > Intel-gfx mailing list<br> > > > > > <a href="mailto:Intel-gfx@lists.freedesktop.org">Intel-gfx@lists.freedesktop.org</a><br> > > > > > <a href="http://lists.freedesktop.org/mailman/listinfo/intel-gfx" target="_blank">http://lists.freedesktop.org/mailman/listinfo/intel-gfx</a><br> > > > ><br> > > > > --<br> > > > > Ville Syrjälä<br> > > > > Intel OTC<br> > > > > _______________________________________________<br> > > > > Intel-gfx mailing list<br> > > > > <a href="mailto:Intel-gfx@lists.freedesktop.org">Intel-gfx@lists.freedesktop.org</a><br> > > > > <a href="http://lists.freedesktop.org/mailman/listinfo/intel-gfx" target="_blank">http://lists.freedesktop.org/mailman/listinfo/intel-gfx</a><br> > > ><br> > > > --<br> > > > Daniel Vetter<br> > > > Software Engineer, Intel Corporation<br> > > > <a href="tel:%2B41%20%280%29%2079%20365%2057%2048" value="+41793655748">+41 (0) 79 365 57 48</a> - <a href="http://blog.ffwll.ch" target="_blank">http://blog.ffwll.ch</a><br> > ><br> > > --<br> > > Ville Syrjälä<br> > > Intel OTC<br> > > _______________________________________________<br> > > Intel-gfx mailing list<br> > > <a href="mailto:Intel-gfx@lists.freedesktop.org">Intel-gfx@lists.freedesktop.org</a><br> > > <a href="http://lists.freedesktop.org/mailman/listinfo/intel-gfx" target="_blank">http://lists.freedesktop.org/mailman/listinfo/intel-gfx</a><br> ><br> > --<br> > Ville Syrjälä<br> > Intel OTC<br> <br> --<br> Daniel Vetter<br> Software Engineer, Intel Corporation<br> <a href="tel:%2B41%20%280%29%2079%20365%2057%2048" value="+41793655748">+41 (0) 79 365 57 48</a> - <a href="http://blog.ffwll.ch" target="_blank">http://blog.ffwll.ch</a><br> _______________________________________________<br> Intel-gfx mailing list<br> <a href="mailto:Intel-gfx@lists.freedesktop.org">Intel-gfx@lists.freedesktop.org</a><br> <a href="http://lists.freedesktop.org/mailman/listinfo/intel-gfx" target="_blank">http://lists.freedesktop.org/mailman/listinfo/intel-gfx</a><br> </div></div></blockquote></div><br><br clear="all"><div><br></div>-- <br><div>Rodrigo Vivi</div><div>Blog: <a href="http://blog.vivi.eng.br" target="_blank">http://blog.vivi.eng.br</a></div><div> </div> </div></div>