<div dir="ltr"><br><div class="gmail_extra"><br><br><div class="gmail_quote">On Thu, Sep 4, 2014 at 1:06 AM, Ville Syrjälä <span dir="ltr"><<a href="mailto:ville.syrjala@linux.intel.com" target="_blank">ville.syrjala@linux.intel.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div class="HOEnZb"><div class="h5">On Wed, Sep 03, 2014 at 10:49:57PM -0400, Rodrigo Vivi wrote:<br>
> Now that we are tracking psr states on Software side we don't need HW help anymore.<br>
> So we can clean up the code a bit and avoid unecessary sets.<br>
><br>
> Signed-off-by: Rodrigo Vivi <<a href="mailto:rodrigo.vivi@intel.com">rodrigo.vivi@intel.com</a>><br>
> ---<br>
> drivers/gpu/drm/i915/intel_dp.c | 12 ------------<br>
> 1 file changed, 12 deletions(-)<br>
><br>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c<br>
> index a796831..9414e67 100644<br>
> --- a/drivers/gpu/drm/i915/intel_dp.c<br>
> +++ b/drivers/gpu/drm/i915/intel_dp.c<br>
> @@ -1778,10 +1778,7 @@ static void intel_edp_psr_enable_sink(struct intel_dp *intel_dp)<br>
> {<br>
> struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);<br>
> struct drm_device *dev = dig_port->base.base.dev;<br>
> - struct drm_i915_private *dev_priv = dev->dev_private;<br>
> uint32_t aux_clock_divider;<br>
> - int precharge = 0x3;<br>
> - int msg_size = 5; /* Header(4) + Message(1) */<br>
> bool only_standby = false;<br>
><br>
> aux_clock_divider = intel_dp->get_aux_clock_divider(intel_dp, 0);<br>
> @@ -1796,15 +1793,6 @@ static void intel_edp_psr_enable_sink(struct intel_dp *intel_dp)<br>
> else<br>
> drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG,<br>
> DP_PSR_ENABLE | DP_PSR_MAIN_LINK_ACTIVE);<br>
> -<br>
> - /* Setup AUX registers */<br>
> - I915_WRITE(EDP_PSR_AUX_DATA1(dev), EDP_PSR_DPCD_COMMAND);<br>
> - I915_WRITE(EDP_PSR_AUX_DATA2(dev), EDP_PSR_DPCD_NORMAL_OPERATION);<br>
> - I915_WRITE(EDP_PSR_AUX_CTL(dev),<br>
> - DP_AUX_CH_CTL_TIME_OUT_400us |<br>
> - (msg_size << DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) |<br>
> - (precharge << DP_AUX_CH_CTL_PRECHARGE_2US_SHIFT) |<br>
> - (aux_clock_divider << DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT));<br>
<br>
</div></div>As I said I blieve FBC is the one that does the hw tracking. I think the<br>
hardware will still do the entry/exit (including automagic link<br>
re-train) but now you've not told it how to wake up the sink. So I don't<br>
understand how this can even work.<br></blockquote><div><br></div><div>Per spec we have to program aux "registers for HW assist PSR Exit Support."</div><div><br></div><div>With the exit being made on SW side we don't need HW help anymore.</div>
<div>Same reason why this works with VLV.</div><div><br></div><div>But there is no way to claim full control. So automagically triggers still exist.</div><div>So I couldn't remove the W/As that mask events on srd_debug. :(</div>
<div><br></div><div>But withouth these aux sets we are fine and it just works.</div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<div class="im HOEnZb"><br>
> }<br>
><br>
> static void intel_edp_psr_enable_source(struct intel_dp *intel_dp)<br>
> --<br>
> 1.9.3<br>
><br>
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<br>
</div><span class="HOEnZb"><font color="#888888">--<br>
Ville Syrjälä<br>
Intel OTC<br>
</font></span><div class="HOEnZb"><div class="h5">_______________________________________________<br>
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</div></div></blockquote></div><br><br clear="all"><div><br></div>-- <br><div>Rodrigo Vivi</div><div>Blog: <a href="http://blog.vivi.eng.br" target="_blank">http://blog.vivi.eng.br</a></div><div> </div>
</div></div>