<div dir="ltr">I just noticed this is a "legacy" mode 48b and standard for skl would be a 64b aligned..<div><br></div><div>But anyway this seems to be the right for now so</div><div>Reviewed-by: Rodrigo Vivi <<a href="mailto:rodrigo.vivi@intel.com">rodrigo.vivi@intel.com</a>></div></div><div class="gmail_extra"><br><div class="gmail_quote">On Thu, Sep 4, 2014 at 4:26 AM, Damien Lespiau <span dir="ltr"><<a href="mailto:damien.lespiau@intel.com" target="_blank">damien.lespiau@intel.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Signed-off-by: Damien Lespiau <<a href="mailto:damien.lespiau@intel.com">damien.lespiau@intel.com</a>><br>
---<br>
 drivers/gpu/drm/i915/i915_gpu_error.c | 1 +<br>
 1 file changed, 1 insertion(+)<br>
<br>
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c<br>
index 1bf6e69..fe14980 100644<br>
--- a/drivers/gpu/drm/i915/i915_gpu_error.c<br>
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c<br>
@@ -924,6 +924,7 @@ static void i915_record_ring_state(struct drm_device *dev,<br>
                ering->vm_info.gfx_mode = I915_READ(RING_MODE_GEN7(ring));<br>
<br>
                switch (INTEL_INFO(dev)->gen) {<br>
+               case 9:<br>
                case 8:<br>
                        for (i = 0; i < 4; i++) {<br>
                                ering->vm_info.pdp[i] =<br>
<span class="HOEnZb"><font color="#888888">--<br>
1.8.3.1<br>
<br>
_______________________________________________<br>
Intel-gfx mailing list<br>
<a href="mailto:Intel-gfx@lists.freedesktop.org">Intel-gfx@lists.freedesktop.org</a><br>
<a href="http://lists.freedesktop.org/mailman/listinfo/intel-gfx" target="_blank">http://lists.freedesktop.org/mailman/listinfo/intel-gfx</a><br>
</font></span></blockquote></div><br><br clear="all"><div><br></div>-- <br><div>Rodrigo Vivi</div><div>Blog: <a href="http://blog.vivi.eng.br" target="_blank">http://blog.vivi.eng.br</a></div><div> </div>
</div>