<div dir="ltr">Oh cool here are the actual fixes on de_pipe int bits! <div><br></div><div>I agree with Daniel that a separated function would be better, but what is here is right anyway so</div><div>Reviewed-by: Rodrigo Vivi <<a href="mailto:rodrigo.vivi@intel.com">rodrigo.vivi@intel.com</a>></div></div><div class="gmail_extra"><br><div class="gmail_quote">On Thu, Sep 4, 2014 at 6:19 AM, Daniel Vetter <span dir="ltr"><<a href="mailto:daniel@ffwll.ch" target="_blank">daniel@ffwll.ch</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div class="HOEnZb"><div class="h5">On Thu, Sep 04, 2014 at 12:26:58PM +0100, Damien Lespiau wrote:<br> > To accomodate the extra planes, the bit definitions were shuffled around<br> > a bit.<br> ><br> > v2: Rebase on top of the for_each_pipe() change adding dev_priv as first<br> > argument.<br> ><br> > Signed-off-by: Damien Lespiau <<a href="mailto:damien.lespiau@intel.com">damien.lespiau@intel.com</a>><br> > ---<br> > drivers/gpu/drm/i915/i915_irq.c | 37 ++++++++++++++++++++++++++++---------<br> > drivers/gpu/drm/i915/i915_reg.h | 13 +++++++++++++<br> > 2 files changed, 41 insertions(+), 9 deletions(-)<br> ><br> > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c<br> > index c62a2e4..734b73e 100644<br> > --- a/drivers/gpu/drm/i915/i915_irq.c<br> > +++ b/drivers/gpu/drm/i915/i915_irq.c<br> > @@ -2584,7 +2584,7 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)<br> > }<br> ><br> > for_each_pipe(dev_priv, pipe) {<br> > - uint32_t pipe_iir;<br> > + uint32_t pipe_iir, flip_done = 0, fault_errors = 0;<br> ><br> > if (!(master_ctl & GEN8_DE_PIPE_IRQ(pipe)))<br> > continue;<br> > @@ -2593,10 +2593,16 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)<br> > if (pipe_iir) {<br> > ret = IRQ_HANDLED;<br> > I915_WRITE(GEN8_DE_PIPE_IIR(pipe), pipe_iir);<br> > +<br> > if (pipe_iir & GEN8_PIPE_VBLANK)<br> > intel_pipe_handle_vblank(dev, pipe);<br> ><br> > - if (pipe_iir & GEN8_PIPE_PRIMARY_FLIP_DONE) {<br> > + if (IS_GEN9(dev))<br> > + flip_done = pipe_iir & GEN9_PIPE_PLANE1_FLIP_DONE;<br> > + else<br> > + flip_done = pipe_iir & GEN8_PIPE_PRIMARY_FLIP_DONE;<br> > +<br> > + if (flip_done) {<br> > intel_prepare_page_flip(dev, pipe);<br> > intel_finish_page_flip_plane(dev, pipe);<br> > }<br> > @@ -2611,11 +2617,16 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)<br> > pipe_name(pipe));<br> > }<br> ><br> > - if (pipe_iir & GEN8_DE_PIPE_IRQ_FAULT_ERRORS) {<br> > +<br> > + if (IS_GEN9(dev))<br> > + fault_errors = pipe_iir & GEN9_DE_PIPE_IRQ_FAULT_ERRORS;<br> > + else<br> > + fault_errors = pipe_iir & GEN8_DE_PIPE_IRQ_FAULT_ERRORS;<br> > +<br> > + if (fault_errors)<br> > DRM_ERROR("Fault errors on pipe %c\n: 0x%08x",<br> > pipe_name(pipe),<br> > pipe_iir & GEN8_DE_PIPE_IRQ_FAULT_ERRORS);<br> > - }<br> > } else<br> > DRM_ERROR("The master control interrupt lied (DE PIPE)!\n");<br> <br> </div></div>gen8+ irq handling functions would _really_ benefit from a bit of function<br> extraction to prevent them from falling off the right edge of my screen<br> all the time ...<br> <br> Just in case you have no idea what to do on a rainy day ;-)<br> -Daniel<br> <div class="HOEnZb"><div class="h5"><br> > }<br> > @@ -3845,12 +3856,20 @@ static void gen8_gt_irq_postinstall(struct drm_i915_private *dev_priv)<br> ><br> > static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)<br> > {<br> > - uint32_t de_pipe_masked = GEN8_PIPE_PRIMARY_FLIP_DONE |<br> > - GEN8_PIPE_CDCLK_CRC_DONE |<br> > - GEN8_DE_PIPE_IRQ_FAULT_ERRORS;<br> > - uint32_t de_pipe_enables = de_pipe_masked | GEN8_PIPE_VBLANK |<br> > - GEN8_PIPE_FIFO_UNDERRUN;<br> > + uint32_t de_pipe_masked = GEN8_PIPE_CDCLK_CRC_DONE;<br> > + uint32_t de_pipe_enables;<br> > int pipe;<br> > +<br> > + if (IS_GEN9(dev_priv))<br> > + de_pipe_masked |= GEN9_PIPE_PLANE1_FLIP_DONE |<br> > + GEN9_DE_PIPE_IRQ_FAULT_ERRORS;<br> > + else<br> > + de_pipe_masked |= GEN8_PIPE_PRIMARY_FLIP_DONE |<br> > + GEN8_DE_PIPE_IRQ_FAULT_ERRORS;<br> > +<br> > + de_pipe_enables = de_pipe_masked | GEN8_PIPE_VBLANK |<br> > + GEN8_PIPE_FIFO_UNDERRUN;<br> > +<br> > dev_priv->de_irq_mask[PIPE_A] = ~de_pipe_masked;<br> > dev_priv->de_irq_mask[PIPE_B] = ~de_pipe_masked;<br> > dev_priv->de_irq_mask[PIPE_C] = ~de_pipe_masked;<br> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h<br> > index acd0a7b..5928a75 100644<br> > --- a/drivers/gpu/drm/i915/i915_reg.h<br> > +++ b/drivers/gpu/drm/i915/i915_reg.h<br> > @@ -4840,10 +4840,23 @@ enum punit_power_well {<br> > #define GEN8_PIPE_SCAN_LINE_EVENT (1 << 2)<br> > #define GEN8_PIPE_VSYNC (1 << 1)<br> > #define GEN8_PIPE_VBLANK (1 << 0)<br> > +#define GEN9_PIPE_CURSOR_FAULT (1 << 11)<br> > +#define GEN9_PIPE_PLANE3_FAULT (1 << 9)<br> > +#define GEN9_PIPE_PLANE2_FAULT (1 << 8)<br> > +#define GEN9_PIPE_PLANE1_FAULT (1 << 7)<br> > +#define GEN9_PIPE_PLANE3_FLIP_DONE (1 << 5)<br> > +#define GEN9_PIPE_PLANE2_FLIP_DONE (1 << 4)<br> > +#define GEN9_PIPE_PLANE1_FLIP_DONE (1 << 3)<br> > +#define GEN9_PIPE_PLANE_FLIP_DONE(p) (1 << (3 + p))<br> > #define GEN8_DE_PIPE_IRQ_FAULT_ERRORS \<br> > (GEN8_PIPE_CURSOR_FAULT | \<br> > GEN8_PIPE_SPRITE_FAULT | \<br> > GEN8_PIPE_PRIMARY_FAULT)<br> > +#define GEN9_DE_PIPE_IRQ_FAULT_ERRORS \<br> > + (GEN9_PIPE_CURSOR_FAULT | \<br> > + GEN9_PIPE_PLANE3_FAULT | \<br> > + GEN9_PIPE_PLANE2_FAULT | \<br> > + GEN9_PIPE_PLANE1_FAULT)<br> ><br> > #define GEN8_DE_PORT_ISR 0x44440<br> > #define GEN8_DE_PORT_IMR 0x44444<br> > --<br> > 1.8.3.1<br> ><br> > _______________________________________________<br> > Intel-gfx mailing list<br> > <a href="mailto:Intel-gfx@lists.freedesktop.org">Intel-gfx@lists.freedesktop.org</a><br> > <a href="http://lists.freedesktop.org/mailman/listinfo/intel-gfx" target="_blank">http://lists.freedesktop.org/mailman/listinfo/intel-gfx</a><br> <br> </div></div><span class="HOEnZb"><font color="#888888">--<br> Daniel Vetter<br> Software Engineer, Intel Corporation<br> <a href="tel:%2B41%20%280%29%2079%20365%2057%2048" value="+41793655748">+41 (0) 79 365 57 48</a> - <a href="http://blog.ffwll.ch" target="_blank">http://blog.ffwll.ch</a><br> </font></span><div class="HOEnZb"><div class="h5">_______________________________________________<br> Intel-gfx mailing list<br> <a href="mailto:Intel-gfx@lists.freedesktop.org">Intel-gfx@lists.freedesktop.org</a><br> <a href="http://lists.freedesktop.org/mailman/listinfo/intel-gfx" target="_blank">http://lists.freedesktop.org/mailman/listinfo/intel-gfx</a><br> </div></div></blockquote></div><br><br clear="all"><div><br></div>-- <br><div>Rodrigo Vivi</div><div>Blog: <a href="http://blog.vivi.eng.br" target="_blank">http://blog.vivi.eng.br</a></div><div> </div> </div>