<html>
<head>
<meta content="text/html; charset=utf-8" http-equiv="Content-Type">
</head>
<body bgcolor="#FFFFFF" text="#000000">
<meta http-equiv="Content-Type" content="text/html; charset=utf-8">
<p style="margin:0in;font-family:Calibri;font-size:11.0pt">Reviewed-by:
Sivakumar
Thulasimani <a class="moz-txt-link-rfc2396E" href="mailto:sivakumar.thulasimani@intel.com"><sivakumar.thulasimani@intel.com></a></p>
<meta name="ProgId" content="OneNote.File">
<meta name="Generator" content="Microsoft OneNote 15">
<br>
<br>
<div class="moz-cite-prefix">On 6/29/2015 5:55 PM,
<a class="moz-txt-link-abbreviated" href="mailto:ville.syrjala@linux.intel.com">ville.syrjala@linux.intel.com</a> wrote:<br>
</div>
<blockquote
cite="mid:1435580756-20154-10-git-send-email-ville.syrjala@linux.intel.com"
type="cite">
<pre wrap="">From: Ville Syrjälä <a class="moz-txt-link-rfc2396E" href="mailto:ville.syrjala@linux.intel.com"><ville.syrjala@linux.intel.com></a>
The BIOS maybe leave the DSI PLL enabled even if the port is disabled.
The PLL doesn't seem to like being reconfigured while it's enabled so
make sure it's disabled before doing that.
The better fix would be to expose all PLLs independently of their ports
so that we could disable any unused ones during the sanitize phase. But
this seems like an OK short term solution.
Signed-off-by: Ville Syrjälä <a class="moz-txt-link-rfc2396E" href="mailto:ville.syrjala@linux.intel.com"><ville.syrjala@linux.intel.com></a>
---
drivers/gpu/drm/i915/intel_dsi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 92bb252..07c4bb3 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -907,6 +907,7 @@ static void intel_dsi_pre_pll_enable(struct intel_encoder *encoder)
intel_dsi_prepare(encoder);
+ vlv_disable_dsi_pll(encoder);
vlv_enable_dsi_pll(encoder);
}
</pre>
</blockquote>
<br>
<pre class="moz-signature" cols="72">--
regards,
Sivakumar</pre>
</body>
</html>