<html> <head> <meta content="text/html; charset=ISO-8859-1" http-equiv="Content-Type"> </head> <body bgcolor="#FFFFFF" text="#000000"> <div class="moz-cite-prefix">On Wednesday 26 August 2015 01:36 AM, Animesh Manna wrote:<br> </div> <blockquote cite="mid:1440533169-32265-2-git-send-email-animesh.manna@intel.com" type="cite"> <pre wrap="">Dmc will restore the csr program except DC9, cold boot, warm reset, PCI function level reset, and hibernate/suspend. intel_csr_load_program() function is used to load the firmware data from kernel memory to csr address space. All values of csr address space will be zero if it got reset and the first byte of csr program is always a non-zero if firmware is loaded successfuly. Based on hardware status will load the firmware. Without this condition check if we overwrite the firmware data the counters exposed for dc5/dc6 (help for debugging) will be nullified. v1: Initial version. v2: Based on review comments from Daniel, - Added a check to know hardware status and load the firmware if not loaded. Cc: Daniel Vetter <a class="moz-txt-link-rfc2396E" href="mailto:daniel.vetter@intel.com"><daniel.vetter@intel.com></a> Cc: Damien Lespiau <a class="moz-txt-link-rfc2396E" href="mailto:damien.lespiau@intel.com"><damien.lespiau@intel.com></a> Cc: Imre Deak <a class="moz-txt-link-rfc2396E" href="mailto:imre.deak@intel.com"><imre.deak@intel.com></a> Cc: Sunil Kamath <a class="moz-txt-link-rfc2396E" href="mailto:sunil.kamath@intel.com"><sunil.kamath@intel.com></a> Signed-off-by: Animesh Manna <a class="moz-txt-link-rfc2396E" href="mailto:animesh.manna@intel.com"><animesh.manna@intel.com></a> Signed-off-by: Vathsala Nagaraju <a class="moz-txt-link-rfc2396E" href="mailto:vathsala.nagaraju@intel.com"><vathsala.nagaraju@intel.com></a> --- drivers/gpu/drm/i915/intel_csr.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c index ba1ae03..682cc26 100644 --- a/drivers/gpu/drm/i915/intel_csr.c +++ b/drivers/gpu/drm/i915/intel_csr.c @@ -252,6 +252,15 @@ void intel_csr_load_program(struct drm_device *dev) return; } + /* + * Dmc will restore the csr the program except DC9, cold boot, + * warm reset, PCI function level reset, and hibernate/suspend. + * This condition will help to check if csr address space is reset/ + * not loaded. + */ + if (I915_READ(CSR_PROGRAM_BASE)) + return; + mutex_lock(&dev_priv->csr_lock); fw_size = dev_priv->csr.dmc_fw_size; for (i = 0; i < fw_size; i++) </pre> </blockquote> <meta http-equiv="CONTENT-TYPE" content="text/html; charset=ISO-8859-1"> <p style="margin-bottom: 0cm">Valid fix and patch is ready for merge now.</p> <p style="margin-bottom: 0cm">Reviewed-by: A.Sunil Kamath <a href="mailto:sunil.kamath@intel.com"><sunil.kamath@intel.com></a></p> <title></title> <meta name="GENERATOR" content="LibreOffice 3.5 (Linux)"> <style type="text/css">  </style> </body> </html>