<html> <head> <meta content="text/html; charset=ISO-8859-1" http-equiv="Content-Type"> </head> <body bgcolor="#FFFFFF" text="#000000"> <div class="moz-cite-prefix">On Wednesday 26 August 2015 01:36 AM, Animesh Manna wrote:<br> </div> <blockquote cite="mid:1440533169-32265-6-git-send-email-animesh.manna@intel.com" type="cite"> <pre wrap="">Another interesting criteria to work dmc as expected is pw1 to be enabled by driver and dmc will shut it off in its execution sequence. If already disabled by driver dmc will get confuse and behave differently than expected found during pc10 entry issue for skl. So berfore we disable power-well 1, added check if dmc firmware is present and driver will not disable power well 1, but for any reason if firmware is not present of failed to load we can shut off the power well 1 which will save some power. As skl is currently fully dependent on dmc to go in lowest possible power state (dc6) but the same is not applicable for bxt. Display engine can enter into dc9 without dmc, hence unblocking disable call. v1: Initial version. v2: Rebased as per current patch series. Cc: Daniel Vetter <a class="moz-txt-link-rfc2396E" href="mailto:daniel.vetter@intel.com"><daniel.vetter@intel.com></a> Cc: Damien Lespiau <a class="moz-txt-link-rfc2396E" href="mailto:damien.lespiau@intel.com"><damien.lespiau@intel.com></a> Cc: Imre Deak <a class="moz-txt-link-rfc2396E" href="mailto:imre.deak@intel.com"><imre.deak@intel.com></a> Cc: Sunil Kamath <a class="moz-txt-link-rfc2396E" href="mailto:sunil.kamath@intel.com"><sunil.kamath@intel.com></a> Signed-off-by: Animesh Manna <a class="moz-txt-link-rfc2396E" href="mailto:animesh.manna@intel.com"><animesh.manna@intel.com></a> Signed-off-by: Vathsala Nagaraju <a class="moz-txt-link-rfc2396E" href="mailto:vathsala.nagaraju@intel.com"><vathsala.nagaraju@intel.com></a> --- drivers/gpu/drm/i915/intel_runtime_pm.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 23a3aa3..340f386 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -652,9 +652,15 @@ static void skl_set_power_well(struct drm_i915_private *dev_priv, } } else { if (enable_requested) { - I915_WRITE(HSW_PWR_WELL_DRIVER, tmp & ~req_mask); - POSTING_READ(HSW_PWR_WELL_DRIVER); - DRM_DEBUG_KMS("Disabling %s\n", power_well->name); + if (IS_SKYLAKE(dev) && + (power_well->data == SKL_DISP_PW_1) && + (intel_csr_load_status_get(dev_priv) == FW_LOADED)) + DRM_DEBUG_KMS("Not Disabling PW1, dmc will handle\n"); + else { + I915_WRITE(HSW_PWR_WELL_DRIVER, tmp & ~req_mask); + POSTING_READ(HSW_PWR_WELL_DRIVER); + DRM_DEBUG_KMS("Disabling %s\n", power_well->name); + } if (GEN9_ENABLE_DC5(dev) && power_well->data == SKL_DISP_PW_2) { </pre> </blockquote> <meta http-equiv="CONTENT-TYPE" content="text/html; charset=ISO-8859-1"> <p style="margin-bottom: 0cm">Valid fix and patch is ready for merge now.</p> <p style="margin-bottom: 0cm">Reviewed-by: A.Sunil Kamath <a href="mailto:sunil.kamath@intel.com"><sunil.kamath@intel.com></a></p> <title></title> <meta name="GENERATOR" content="LibreOffice 3.5 (Linux)"> <style type="text/css">  </style> </body> </html>