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<div class="moz-cite-prefix">On 05/11/15 00:31, Zhao Yakui wrote:<br>
</div>
<blockquote cite="mid:563AA371.4050204@intel.com" type="cite">On
11/04/2015 11:27 PM, Lionel Landwerlin wrote:
<br>
<blockquote type="cite">---
<br>
src/shaders/post_processing/gen7/YUV_to_RGB.g4a | 626
++++++++++++----------
<br>
src/shaders/post_processing/gen7/pl2_to_rgbx.g75b | 528
+++++++++---------
<br>
src/shaders/post_processing/gen7/pl2_to_rgbx.g7b | 528
+++++++++---------
<br>
3 files changed, 909 insertions(+), 773 deletions(-)
<br>
<br>
diff --git a/src/shaders/post_processing/gen7/YUV_to_RGB.g4a
b/src/shaders/post_processing/gen7/YUV_to_RGB.g4a
<br>
index 24616dc..6af651f 100644
<br>
--- a/src/shaders/post_processing/gen7/YUV_to_RGB.g4a
<br>
+++ b/src/shaders/post_processing/gen7/YUV_to_RGB.g4a
<br>
@@ -386,34 +386,36 @@
<br>
mov (8) fBUFFER_V(0, 0)<1> r[a0.0,
1]<16;8,2>:ub
<br>
mov (8) fBUFFER_V(1, 0)<1> r[a0.0,
17]<16;8,2>:ub
<br>
<br>
- add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0,
0)<8;8,1> -128.0f
<br>
- add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0,
0)<8;8,1> -128.0f
<br>
</blockquote>
<br>
As far as I know, the value in fBUEER_U/V is still in [0 255]
range.
<br>
So I think that it still should be extraced by 128 before it is
normalized to [0..1].
<br>
</blockquote>
<br>
Looking at the green component for example, given the following
coefficients for Y, U and V :<br>
<br>
CY = 1.0<br>
CU = -0.344<br>
CV = -0.714<br>
<br>
This is what the current shader does :<br>
<br>
green = ((Y + (U - 128) * CU + (V - 128) * CV) * 0.0039216) * 255<br>
<br>
The shader in this patch does this :<br>
<br>
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green = (Y * 0.0039216 + (U * 0.0039216 - 128.0 / 255) * CU + (CV *
0.0039216 - 128.0 / 255) * CV) * 255<br>
<br>
This looks equivalent to me given that<br>
<br>
128.0 / 255 ~= 128 * 0.0039216<br>
<br>
we just distribute the [0..1] normalizing factor earlier.<br>
<br>
It's possible to do what you suggest, but it would require more
instructions.<br>
Maybe I'm missing some precision stuff that is specific to the
hardware?<br>
<br>
<blockquote cite="mid:563AA371.4050204@intel.com" type="cite">
<br>
<br>
<blockquote type="cite">+ mul (16) fBUFFER_Y(0,
0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f
<br>
+ mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0,
0)<1> 0.0039216f
<br>
+ mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0,
0)<1> 0.0039216f
<br>
</blockquote>
<br>
</blockquote>
<br>
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