Mesa (radeon-rewrite): radeon: tiling support
Dave Airlie
airlied at kemper.freedesktop.org
Thu Apr 2 04:47:59 UTC 2009
Module: Mesa
Branch: radeon-rewrite
Commit: 104d5422052d0c03b121d196f7c0a8ef0af4ecab
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=104d5422052d0c03b121d196f7c0a8ef0af4ecab
Author: Dave Airlie <airlied at redhat.com>
Date: Thu Apr 2 13:35:09 2009 +1000
radeon: tiling support
---
src/mesa/drivers/dri/r300/r300_cmdbuf.c | 6 +++---
src/mesa/drivers/dri/r300/r300_ioctl.c | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.c b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
index d85f106..fc8a2e7 100644
--- a/src/mesa/drivers/dri/r300/r300_cmdbuf.c
+++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
@@ -230,11 +230,11 @@ static void emit_cb_offset(GLcontext *ctx, struct radeon_state_atom * atom)
if (rrb->bo->flags & RADEON_BO_FLAGS_MACRO_TILE)
cbpitch |= R300_COLOR_TILE_ENABLE;
- BEGIN_BATCH_NO_AUTOSTATE(6);
+ BEGIN_BATCH_NO_AUTOSTATE(8);
OUT_BATCH_REGSEQ(R300_RB3D_COLOROFFSET0, 1);
OUT_BATCH_RELOC(offset, rrb->bo, offset, 0, RADEON_GEM_DOMAIN_VRAM, 0);
OUT_BATCH_REGSEQ(R300_RB3D_COLORPITCH0, 1);
- OUT_BATCH(cbpitch);
+ OUT_BATCH_RELOC(cbpitch, rrb->bo, cbpitch, 0, RADEON_GEM_DOMAIN_VRAM, 0);
END_BATCH();
}
@@ -282,7 +282,7 @@ static void emit_zstencil_format(GLcontext *ctx, struct radeon_state_atom * atom
}
OUT_BATCH(atom->cmd[0]);
- atom->cmd[1] &= ~(3 << 0);
+ atom->cmd[1] &= ~0xf;
atom->cmd[1] |= format;
OUT_BATCH(atom->cmd[1]);
OUT_BATCH(atom->cmd[2]);
diff --git a/src/mesa/drivers/dri/r300/r300_ioctl.c b/src/mesa/drivers/dri/r300/r300_ioctl.c
index 1314550..a7f5121 100644
--- a/src/mesa/drivers/dri/r300/r300_ioctl.c
+++ b/src/mesa/drivers/dri/r300/r300_ioctl.c
@@ -624,7 +624,7 @@ static void r300Clear(GLcontext * ctx, GLbitfield mask)
/* HW depth */
if (mask & BUFFER_BIT_DEPTH) {
- tri_mask |= BUFFER_BIT_DEPTH;
+ tri_mask |= BUFFER_BIT_DEPTH;
}
/* If we're doing a tri pass for depth/stencil, include a likely color
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