Mesa (master): i965: set BRW_MASK_DISABLE flag in "send" instruction in brw_dp_READ_4()

[Brian Paul]

Module: Mesa
Branch: master
Commit: 8131123effd2124b8ca2aad04bf543e2fe82c7b0
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8131123effd2124b8ca2aad04bf543e2fe82c7b0

Author: Brian Paul <brianp at vmware.com>
Date:   Wed Apr  8 19:35:24 2009 -0600

i965: set BRW_MASK_DISABLE flag in "send" instruction in brw_dp_READ_4()

This fixes the random results that were seen when fetching a constant
inside an IF/ELSE clause.  Disabling the execution mask ensures that all
the components of the register are written.

---

 src/mesa/drivers/dri/i965/brw_eu_emit.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 21ce836..220c3af 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -978,9 +978,10 @@ void brw_dp_READ_4( struct brw_compile *p,
    {
       struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND);
    
-      insn->header.predicate_control = 0; /* XXX */
+      insn->header.predicate_control = BRW_PREDICATE_NONE;
       insn->header.compression_control = BRW_COMPRESSION_NONE; 
       insn->header.destreg__conditonalmod = msg_reg_nr;
+      insn->header.mask_control = BRW_MASK_DISABLE;
   
       /* cast dest to a uword[8] vector */
       dest = retype(vec8(dest), BRW_REGISTER_TYPE_UW);