Mesa (master): i965: increase number of texture samplers to 16

Brian Paul brianp at kemper.freedesktop.org
Thu Jan 1 21:07:00 UTC 2009


Module: Mesa
Branch: master
Commit: 4a6ad999ea312f0af85de621c8b6a15a3d3b7ffd
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4a6ad999ea312f0af85de621c8b6a15a3d3b7ffd

Author: Brian Paul <brianp at vmware.com>
Date:   Thu Jan  1 14:04:57 2009 -0700

i965: increase number of texture samplers to 16

This lets GLSL shaders use up to 16 samplers.
Fixed function is still limited to 8 textures.
Tested with progs/glsl/samplers.c

---

 src/mesa/drivers/dri/i965/brw_context.c |    6 ++++--
 src/mesa/drivers/dri/i965/brw_context.h |    2 +-
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 1d6ac2c..a415e37 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -32,6 +32,7 @@
 
 #include "main/imports.h"
 #include "main/api_noop.h"
+#include "main/macros.h"
 #include "main/vtxfmt.h"
 #include "main/simple_list.h"
 #include "shader/shader_api.h"
@@ -128,9 +129,10 @@ GLboolean brwCreateContext( const __GLcontextModes *mesaVis,
 
    TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
 
-   ctx->Const.MaxTextureUnits = BRW_MAX_TEX_UNIT;
    ctx->Const.MaxTextureImageUnits = BRW_MAX_TEX_UNIT;
-   ctx->Const.MaxTextureCoordUnits = BRW_MAX_TEX_UNIT;
+   ctx->Const.MaxTextureCoordUnits = 8; /* Mesa limit */
+   ctx->Const.MaxTextureUnits = MIN2(ctx->Const.MaxTextureCoordUnits,
+                                     ctx->Const.MaxTextureImageUnits);
    ctx->Const.MaxVertexTextureImageUnits = 0; /* no vertex shader textures */
 
    /* Advertise the full hardware capabilities.  The new memory
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 7798010..5d3f99e 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -238,7 +238,7 @@ struct brw_vs_ouput_sizes {
 };
 
 
-#define BRW_MAX_TEX_UNIT 8
+#define BRW_MAX_TEX_UNIT 16
 #define BRW_WM_MAX_SURF BRW_MAX_TEX_UNIT + MAX_DRAW_BUFFERS
 
 enum brw_cache_id {




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