Mesa (master): intel: fix the mismerge of the vblank pipe enable sanity check

[Jesse Barnes]

Module: Mesa
Branch: master
Commit: e57e39896049a045751201e912779872026fc741
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e57e39896049a045751201e912779872026fc741

Author: Jesse Barnes <jbarnes at virtuousgeek.org>
Date:   Fri Jan 23 13:18:13 2009 -0800

intel: fix the mismerge of the vblank pipe enable sanity check

Fix the last merge fix, had the blocks ordered incorrectly.

---

 src/mesa/drivers/dri/intel/intel_buffers.c |   12 ++++++------
 1 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/mesa/drivers/dri/intel/intel_buffers.c b/src/mesa/drivers/dri/intel/intel_buffers.c
index 3444e29..f1a08c5 100644
--- a/src/mesa/drivers/dri/intel/intel_buffers.c
+++ b/src/mesa/drivers/dri/intel/intel_buffers.c
@@ -166,19 +166,19 @@ intelFixupVblank(struct intel_context *intel, __DRIdrawablePrivate *dPriv)
       GLint areaB = driIntersectArea( drw_rect, planeB_rect );
       GLuint flags = dPriv->vblFlags;
 
-      /* Do the stupid test: Is one of them actually disabled?
+      /* Update vblank info
        */
-      if (sarea->planeA_w == 0 || sarea->planeA_h == 0) {
+      if (areaB > areaA || (areaA == areaB && areaB > 0)) {
 	 flags = dPriv->vblFlags | VBLANK_FLAG_SECONDARY;
-      } else if (sarea->planeB_w == 0 || sarea->planeB_h == 0) {
+      } else {
 	 flags = dPriv->vblFlags & ~VBLANK_FLAG_SECONDARY;
       }
 
-      /* Update vblank info
+      /* Do the stupid test: Is one of them actually disabled?
        */
-      if (areaB > areaA || (areaA == areaB && areaB > 0)) {
+      if (sarea->planeA_w == 0 || sarea->planeA_h == 0) {
 	 flags = dPriv->vblFlags | VBLANK_FLAG_SECONDARY;
-      } else {
+      } else if (sarea->planeB_w == 0 || sarea->planeB_h == 0) {
 	 flags = dPriv->vblFlags & ~VBLANK_FLAG_SECONDARY;
       }