Mesa (master): tgsi: Add proper constraints to sanity.

Michał Król michal at kemper.freedesktop.org
Thu Jul 30 09:52:38 UTC 2009


Module: Mesa
Branch: master
Commit: 6c70285e330bd19db78b7d45e43a01b0255ca15f
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6c70285e330bd19db78b7d45e43a01b0255ca15f

Author: Michal Krol <michal at vmware.com>
Date:   Thu Jul 30 11:39:06 2009 +0200

tgsi: Add proper constraints to sanity.

---

 src/gallium/auxiliary/tgsi/tgsi_sanity.c |   24 ++++++++++++++++++++++--
 1 files changed, 22 insertions(+), 2 deletions(-)

diff --git a/src/gallium/auxiliary/tgsi/tgsi_sanity.c b/src/gallium/auxiliary/tgsi/tgsi_sanity.c
index 8bb186b..cb62a95 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_sanity.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_sanity.c
@@ -235,9 +235,29 @@ iter_instruction(
             index,
             "indirect",
             FALSE );
-         if (file != TGSI_FILE_ADDRESS || index != 0)
-            report_warning( ctx, "Indirect register not ADDR[0]" );
+         if (!(file == TGSI_FILE_ADDRESS || file == TGSI_FILE_LOOP) || index != 0) {
+            report_warning(ctx, "Indirect register neither ADDR[0] nor LOOP[0]");
+         }
+      }
+   }
+
+   switch (inst->Instruction.Opcode) {
+   case TGSI_OPCODE_LOOP:
+   case TGSI_OPCODE_ENDLOOP:
+      if (inst->FullDstRegisters[0].DstRegister.File != TGSI_FILE_LOOP ||
+          inst->FullDstRegisters[0].DstRegister.Index != 0) {
+         report_error(ctx, "Destination register must be LOOP[0]");
+      }
+      break;
+   }
+
+   switch (inst->Instruction.Opcode) {
+   case TGSI_OPCODE_LOOP:
+      if (inst->FullSrcRegisters[0].SrcRegister.File != TGSI_FILE_CONSTANT &&
+          inst->FullSrcRegisters[0].SrcRegister.File != TGSI_FILE_IMMEDIATE) {
+         report_error(ctx, "Source register file must be either CONST or IMM");
       }
+      break;
    }
 
    ctx->num_instructions++;




More information about the mesa-commit mailing list