Mesa (r6xx-rewrite): add LINK_STATES for SPI_PS and SEMANTIC
Cooper Yuan
cooperyuan at kemper.freedesktop.org
Mon Jun 22 02:17:42 UTC 2009
Module: Mesa
Branch: r6xx-rewrite
Commit: 46ca8e5782ebb71d6e5f8a29c1c66b4891bf4916
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=46ca8e5782ebb71d6e5f8a29c1c66b4891bf4916
Author: Cooper Yuan <cooperyuan at gmail.com>
Date: Mon Jun 22 10:16:01 2009 +0800
add LINK_STATES for SPI_PS and SEMANTIC
---
src/mesa/drivers/dri/r600/r700_chip.c | 69 +++++++++++++++++++++++++++++++-
src/mesa/drivers/dri/r600/r700_chip.h | 68 ++++++++++++++++++++++++++++++-
src/mesa/drivers/dri/r600/r700_state.c | 6 +-
3 files changed, 137 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/r600/r700_chip.c b/src/mesa/drivers/dri/r600/r700_chip.c
index 6e7adf7..6682728 100644
--- a/src/mesa/drivers/dri/r600/r700_chip.c
+++ b/src/mesa/drivers/dri/r600/r700_chip.c
@@ -181,7 +181,40 @@ GLboolean r700InitChipObject(context_t *context)
LINK_STATES(VGT_REUSE_OFF);
LINK_STATES(VGT_VTX_CNT_EN);
LINK_STATES(VGT_STRMOUT_BUFFER_EN);
-
+
+ LINK_STATES(SQ_VTX_SEMANTIC_0);
+ LINK_STATES(SQ_VTX_SEMANTIC_1);
+ LINK_STATES(SQ_VTX_SEMANTIC_2);
+ LINK_STATES(SQ_VTX_SEMANTIC_3);
+ LINK_STATES(SQ_VTX_SEMANTIC_4);
+ LINK_STATES(SQ_VTX_SEMANTIC_5);
+ LINK_STATES(SQ_VTX_SEMANTIC_6);
+ LINK_STATES(SQ_VTX_SEMANTIC_7);
+ LINK_STATES(SQ_VTX_SEMANTIC_8);
+ LINK_STATES(SQ_VTX_SEMANTIC_9);
+ LINK_STATES(SQ_VTX_SEMANTIC_10);
+ LINK_STATES(SQ_VTX_SEMANTIC_11);
+ LINK_STATES(SQ_VTX_SEMANTIC_12);
+ LINK_STATES(SQ_VTX_SEMANTIC_13);
+ LINK_STATES(SQ_VTX_SEMANTIC_14);
+ LINK_STATES(SQ_VTX_SEMANTIC_15);
+ LINK_STATES(SQ_VTX_SEMANTIC_16);
+ LINK_STATES(SQ_VTX_SEMANTIC_17);
+ LINK_STATES(SQ_VTX_SEMANTIC_18);
+ LINK_STATES(SQ_VTX_SEMANTIC_19);
+ LINK_STATES(SQ_VTX_SEMANTIC_20);
+ LINK_STATES(SQ_VTX_SEMANTIC_21);
+ LINK_STATES(SQ_VTX_SEMANTIC_22);
+ LINK_STATES(SQ_VTX_SEMANTIC_23);
+ LINK_STATES(SQ_VTX_SEMANTIC_24);
+ LINK_STATES(SQ_VTX_SEMANTIC_25);
+ LINK_STATES(SQ_VTX_SEMANTIC_26);
+ LINK_STATES(SQ_VTX_SEMANTIC_27);
+ LINK_STATES(SQ_VTX_SEMANTIC_28);
+ LINK_STATES(SQ_VTX_SEMANTIC_29);
+ LINK_STATES(SQ_VTX_SEMANTIC_30);
+ LINK_STATES(SQ_VTX_SEMANTIC_31);
+
// SPI
LINK_STATES(SPI_VS_OUT_ID_0);
LINK_STATES(SPI_VS_OUT_ID_1);
@@ -193,6 +226,40 @@ GLboolean r700InitChipObject(context_t *context)
LINK_STATES(SPI_VS_OUT_ID_7);
LINK_STATES(SPI_VS_OUT_ID_8);
LINK_STATES(SPI_VS_OUT_ID_9);
+
+ LINK_STATES(SPI_PS_INPUT_CNTL_0);
+ LINK_STATES(SPI_PS_INPUT_CNTL_1);
+ LINK_STATES(SPI_PS_INPUT_CNTL_2);
+ LINK_STATES(SPI_PS_INPUT_CNTL_3);
+ LINK_STATES(SPI_PS_INPUT_CNTL_4);
+ LINK_STATES(SPI_PS_INPUT_CNTL_5);
+ LINK_STATES(SPI_PS_INPUT_CNTL_6);
+ LINK_STATES(SPI_PS_INPUT_CNTL_7);
+ LINK_STATES(SPI_PS_INPUT_CNTL_8);
+ LINK_STATES(SPI_PS_INPUT_CNTL_9);
+ LINK_STATES(SPI_PS_INPUT_CNTL_10);
+ LINK_STATES(SPI_PS_INPUT_CNTL_11);
+ LINK_STATES(SPI_PS_INPUT_CNTL_12);
+ LINK_STATES(SPI_PS_INPUT_CNTL_13);
+ LINK_STATES(SPI_PS_INPUT_CNTL_14);
+ LINK_STATES(SPI_PS_INPUT_CNTL_15);
+ LINK_STATES(SPI_PS_INPUT_CNTL_16);
+ LINK_STATES(SPI_PS_INPUT_CNTL_17);
+ LINK_STATES(SPI_PS_INPUT_CNTL_18);
+ LINK_STATES(SPI_PS_INPUT_CNTL_19);
+ LINK_STATES(SPI_PS_INPUT_CNTL_20);
+ LINK_STATES(SPI_PS_INPUT_CNTL_21);
+ LINK_STATES(SPI_PS_INPUT_CNTL_22);
+ LINK_STATES(SPI_PS_INPUT_CNTL_23);
+ LINK_STATES(SPI_PS_INPUT_CNTL_24);
+ LINK_STATES(SPI_PS_INPUT_CNTL_25);
+ LINK_STATES(SPI_PS_INPUT_CNTL_26);
+ LINK_STATES(SPI_PS_INPUT_CNTL_27);
+ LINK_STATES(SPI_PS_INPUT_CNTL_28);
+ LINK_STATES(SPI_PS_INPUT_CNTL_29);
+ LINK_STATES(SPI_PS_INPUT_CNTL_30);
+ LINK_STATES(SPI_PS_INPUT_CNTL_31);
+
LINK_STATES(SPI_VS_OUT_CONFIG);
LINK_STATES(SPI_THREAD_GROUPING);
LINK_STATES(SPI_PS_IN_CONTROL_0);
diff --git a/src/mesa/drivers/dri/r600/r700_chip.h b/src/mesa/drivers/dri/r600/r700_chip.h
index f135b5e..fc38e96 100644
--- a/src/mesa/drivers/dri/r600/r700_chip.h
+++ b/src/mesa/drivers/dri/r600/r700_chip.h
@@ -416,8 +416,72 @@ typedef struct _R700_CHIP_CONTEXT
union UINT_FLOAT SPI_FOG_CNTL ; /* 0xA1B7 */
union UINT_FLOAT SPI_FOG_FUNC_SCALE ; /* 0xA1B8 */
union UINT_FLOAT SPI_FOG_FUNC_BIAS ; /* 0xA1B9 */
- union UINT_FLOAT SQ_VTX_SEMANTIC[R700_MAX_SHADER_EXPORTS];
- union UINT_FLOAT SPI_PS_INPUT_CNTL[R700_MAX_SHADER_EXPORTS];
+
+ union UINT_FLOAT SQ_VTX_SEMANTIC_0 ; /* 0xA0E0 */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_1 ; /* 0xA0E1 */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_2 ; /* 0xA0E2 */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_3 ; /* 0xA0E3 */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_4 ; /* 0xA0E4 */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_5 ; /* 0xA0E5 */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_6 ; /* 0xA0E6 */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_7 ; /* 0xA0E7 */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_8 ; /* 0xA0E8 */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_9 ; /* 0xA0E9 */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_10 ; /* 0xA0EA */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_11 ; /* 0xA0EB */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_12 ; /* 0xA0EC */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_13 ; /* 0xA0ED */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_14 ; /* 0xA0EE */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_15 ; /* 0xA0EF */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_16 ; /* 0xA0F0 */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_17 ; /* 0xA0F1 */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_18 ; /* 0xA0F2 */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_19 ; /* 0xA0F3 */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_20 ; /* 0xA0F4 */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_21 ; /* 0xA0F5 */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_22 ; /* 0xA0F6 */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_23 ; /* 0xA0F7 */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_24 ; /* 0xA0F8 */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_25 ; /* 0xA0F9 */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_26 ; /* 0xA0FA */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_27 ; /* 0xA0FB */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_28 ; /* 0xA0FC */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_29 ; /* 0xA0FD */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_30 ; /* 0xA0FE */
+ union UINT_FLOAT SQ_VTX_SEMANTIC_31 ; /* 0xA0FF */
+
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_0 ; /* 0xA191 */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_1 ; /* 0xA192 */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_2 ; /* 0xA193 */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_3 ; /* 0xA194 */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_4 ; /* 0xA195 */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_5 ; /* 0xA196 */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_6 ; /* 0xA197 */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_7 ; /* 0xA198 */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_8 ; /* 0xA199 */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_9 ; /* 0xA19A */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_10 ; /* 0xA19B */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_11 ; /* 0xA19C */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_12 ; /* 0xA19D */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_13 ; /* 0xA19E */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_14 ; /* 0xA19F */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_15 ; /* 0xA1A0 */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_16 ; /* 0xA1A1 */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_17 ; /* 0xA1A2 */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_18 ; /* 0xA1A3 */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_19 ; /* 0xA1A4 */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_20 ; /* 0xA1A5 */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_21 ; /* 0xA1A6 */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_22 ; /* 0xA1A7 */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_23 ; /* 0xA1A8 */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_24 ; /* 0xA1A9 */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_25 ; /* 0xA1AA */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_26 ; /* 0xA1AB */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_27 ; /* 0xA1AC */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_28 ; /* 0xA1AD */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_29 ; /* 0xA1AE */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_30 ; /* 0xA1AF */
+ union UINT_FLOAT SPI_PS_INPUT_CNTL_31 ; /* 0xA1B0 */
// shaders
PS_STATE_STRUCT ps;
diff --git a/src/mesa/drivers/dri/r600/r700_state.c b/src/mesa/drivers/dri/r600/r700_state.c
index 329a4aa..208f18a 100644
--- a/src/mesa/drivers/dri/r600/r700_state.c
+++ b/src/mesa/drivers/dri/r600/r700_state.c
@@ -1040,9 +1040,9 @@ void r700InitState(GLcontext * ctx) //-------------------
r700->SPI_VS_OUT_ID_0.u32All = 0x03020100;
r700->SPI_VS_OUT_ID_1.u32All = 0x07060504;
- r700->SPI_PS_INPUT_CNTL[0].u32All = 0x00000800;
- r700->SPI_PS_INPUT_CNTL[1].u32All = 0x00000801;
- r700->SPI_PS_INPUT_CNTL[2].u32All = 0x00000802;
+ r700->SPI_PS_INPUT_CNTL_0.u32All = 0x00000800;
+ r700->SPI_PS_INPUT_CNTL_1.u32All = 0x00000801;
+ r700->SPI_PS_INPUT_CNTL_2.u32All = 0x00000802;
r700->SPI_THREAD_GROUPING.u32All = 0;
if (context->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV770)
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