Mesa (master): i965: Collect GLSL src/dst regs up in generic code.
Eric Anholt
anholt at kemper.freedesktop.org
Fri Nov 6 21:24:05 PST 2009
Module: Mesa
Branch: master
Commit: 0f34cdf6210b748db77c5eba2993637f4af6faeb
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f34cdf6210b748db77c5eba2993637f4af6faeb
Author: Eric Anholt <eric at anholt.net>
Date: Wed Aug 12 12:56:35 2009 -0700
i965: Collect GLSL src/dst regs up in generic code.
This matches brw_wm_emit.c, which we'll be using shortly. There's a
possible penalty here in that we'll allocate registers for unused channels,
since we aren't doing ref tracking like brw_wm_pass*.c does. However, my
measurements on GM965 don't show any for either OA or UT2004 with the GLSL
path forced.
---
src/mesa/drivers/dri/i965/brw_wm.h | 2 ++
src/mesa/drivers/dri/i965/brw_wm_glsl.c | 22 +++++++++++++++-------
2 files changed, 17 insertions(+), 7 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index 47aa4da..f841d25 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -162,6 +162,8 @@ struct brw_wm_instruction {
#define BRW_WM_MAX_CONST 256
#define BRW_WM_MAX_SUBROUTINE 16
+/* used in masks next to WRITEMASK_*. */
+#define SATURATE (1<<5)
/* New opcodes to track internal operations required for WM unit.
diff --git a/src/mesa/drivers/dri/i965/brw_wm_glsl.c b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
index 28d6d4e..fd6d6c5 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_glsl.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
@@ -2771,6 +2771,21 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c)
if (c->fp->use_const_buffer)
fetch_constants(c, inst);
+ if (inst->Opcode != OPCODE_ARL) {
+ for (j = 0; j < 4; j++) {
+ if (inst->DstReg.WriteMask & (1 << j))
+ dst[j] = get_dst_reg(c, inst, j);
+ else
+ dst[j] = brw_null_reg();
+ }
+ }
+ for (j = 0; j < brw_wm_nr_args(inst->Opcode); j++)
+ get_argument_regs(c, inst, j, args[j], WRITEMASK_XYZW);
+
+ dst_flags = inst->DstReg.WriteMask;
+ if (inst->SaturateMode == SATURATE_ZERO_ONE)
+ dst_flags |= SATURATE;
+
if (inst->CondUpdate)
brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
else
@@ -2866,13 +2881,6 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c)
break;
case OPCODE_DDX:
case OPCODE_DDY:
- for (j = 0; j < 4; j++) {
- if (inst->DstReg.WriteMask & (1 << j))
- dst[j] = get_dst_reg(c, inst, j);
- else
- dst[j] = brw_null_reg();
- }
- get_argument_regs(c, inst, 0, args[0], WRITEMASK_XYZW);
emit_ddxy(p, dst, dst_flags, (inst->Opcode == OPCODE_DDX),
args[0]);
break;
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