Mesa (master): r600: r700PredictRenderSize can flush, so move index buffer setup after it

[Andre Maasikas]

Module: Mesa
Branch: master
Commit: ec58dac86d3068b47c5a4e0187ef56985dcbf75c
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ec58dac86d3068b47c5a4e0187ef56985dcbf75c

Author: Andre Maasikas <amaasikas at gmail.com>
Date:   Mon Oct  5 09:38:52 2009 +0300

r600: r700PredictRenderSize can flush, so move index buffer setup after it

---

 src/mesa/drivers/dri/r600/r700_render.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/src/mesa/drivers/dri/r600/r700_render.c b/src/mesa/drivers/dri/r600/r700_render.c
index 0aef0b7..4f39d9f 100644
--- a/src/mesa/drivers/dri/r600/r700_render.c
+++ b/src/mesa/drivers/dri/r600/r700_render.c
@@ -960,7 +960,6 @@ static GLboolean r700TryDrawPrims(GLcontext *ctx,
 
     _tnl_UpdateFixedFunctionProgram(ctx);
     r700SetVertexFormat(ctx, arrays, max_index + 1);
-    r700SetupIndexBuffer(ctx, ib);
     /* shaders need to be updated before buffers are validated */
     r700UpdateShaders2(ctx);
     if (!r600ValidateBuffers(ctx))
@@ -981,6 +980,7 @@ static GLboolean r700TryDrawPrims(GLcontext *ctx,
     GLuint emit_end = r700PredictRenderSize(ctx, nr_prims)
                     + context->radeon.cmdbuf.cs->cdw;
 
+    r700SetupIndexBuffer(ctx, ib);
     r700SetupStreams2(ctx, arrays, max_index + 1);
 
     radeonEmitState(radeon);