Mesa (master): i965: Fix the maximum grf counting in the new FS backend.
Eric Anholt
anholt at kemper.freedesktop.org
Fri Aug 27 19:28:52 UTC 2010
Module: Mesa
Branch: master
Commit: 40932c1752b0fa918d764e3367f5ab450033304a
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=40932c1752b0fa918d764e3367f5ab450033304a
Author: Eric Anholt <eric at anholt.net>
Date: Fri Aug 27 12:19:30 2010 -0700
i965: Fix the maximum grf counting in the new FS backend.
glsl-algebraic-rcp-rsq managed to use 33 registers, and we claimed to
only use 32, so the write to g32 would go stomping over the precious
g0 of some other thread.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index f8b0622..673a31c 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -1357,7 +1357,7 @@ fs_visitor::assign_regs()
last_grf = MAX2(last_grf, inst->src[1].hw_reg);
}
- this->grf_used = last_grf;
+ this->grf_used = last_grf + 1;
}
static struct brw_reg brw_reg_from_fs_reg(fs_reg *reg)
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