Mesa (master): i965: Handle saturates on gen6 math instructions.
Eric Anholt
anholt at kemper.freedesktop.org
Tue Dec 7 20:21:20 UTC 2010
Module: Mesa
Branch: master
Commit: 72845d206e692581b6084c56b8d1f3bc689e8a03
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=72845d206e692581b6084c56b8d1f3bc689e8a03
Author: Eric Anholt <eric at anholt.net>
Date: Tue Dec 7 11:32:50 2010 -0800
i965: Handle saturates on gen6 math instructions.
We get saturate as an argument to brw_math() instead of as compile
state, since that's how the pre-gen6 send instructions work. Fixes
fp-ex2-sat.
---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index c181c31..96aa046 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -1281,6 +1281,7 @@ void brw_math( struct brw_compile *p,
* becomes FC[3:0] and ThreadCtrl becomes FC[5:4].
*/
insn->header.destreg__conditionalmod = function;
+ insn->header.saturate = saturate;
brw_set_dest(p, insn, dest);
brw_set_src0(insn, src);
@@ -1371,6 +1372,7 @@ void brw_math_16( struct brw_compile *p,
* becomes FC[3:0] and ThreadCtrl becomes FC[5:4].
*/
insn->header.destreg__conditionalmod = function;
+ insn->header.saturate = saturate;
brw_set_dest(p, insn, dest);
brw_set_src0(insn, src);
More information about the mesa-commit
mailing list