Mesa (master): i965: Set up the color masking for the first drawbuffer on gen6.

[Eric Anholt]

Module: Mesa
Branch: master
Commit: 0d3b8a5cc2c1730af0efc69482d36a86ff18f15e
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0d3b8a5cc2c1730af0efc69482d36a86ff18f15e

Author: Eric Anholt <eric at anholt.net>
Date:   Wed Dec  8 09:52:56 2010 -0800

i965: Set up the color masking for the first drawbuffer on gen6.

Fixes glean/maskedClear

---

 src/mesa/drivers/dri/i965/gen6_cc.c |    9 +++++++++
 1 files changed, 9 insertions(+), 0 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/gen6_cc.c b/src/mesa/drivers/dri/i965/gen6_cc.c
index f51cf5f..dfcef20 100644
--- a/src/mesa/drivers/dri/i965/gen6_cc.c
+++ b/src/mesa/drivers/dri/i965/gen6_cc.c
@@ -35,6 +35,7 @@
 struct gen6_blend_state_key {
    GLboolean color_blend, alpha_enabled;
    GLboolean dither;
+   GLboolean color_mask[4];
 
    GLenum logic_op;
 
@@ -54,6 +55,9 @@ blend_state_populate_key(struct brw_context *brw,
    memset(key, 0, sizeof(*key));
 
    /* _NEW_COLOR */
+   memcpy(key->color_mask, ctx->Color.ColorMask[0], sizeof(key->color_mask));
+
+   /* _NEW_COLOR */
    if (ctx->Color._LogicOpEnabled)
       key->logic_op = ctx->Color.LogicOp;
    else
@@ -137,6 +141,11 @@ blend_state_create_from_key(struct brw_context *brw,
       blend.blend1.x_dither_offset = 0;
    }
 
+   blend.blend1.write_disable_r = !key->color_mask[0];
+   blend.blend1.write_disable_g = !key->color_mask[1];
+   blend.blend1.write_disable_b = !key->color_mask[2];
+   blend.blend1.write_disable_a = !key->color_mask[3];
+
    bo = brw_upload_cache(&brw->cache, BRW_BLEND_STATE,
 			 key, sizeof(*key),
 			 NULL, 0,