Mesa (master): pipebuffer: fix inverted signalled checking

[Jose Fonseca]

Module: Mesa
Branch: master
Commit: c36b912e09a12b60d26fd1ebe0939b457514d800
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c36b912e09a12b60d26fd1ebe0939b457514d800

Author: Luca Barbieri <luca at luca-barbieri.com>
Date:   Tue Feb 23 08:55:38 2010 -0800

pipebuffer: fix inverted signalled checking

A return of 0 means the fence is signalled.

Signed-off-by: José Fonseca <jfonseca at vmware.com>

---

 .../auxiliary/pipebuffer/pb_buffer_fenced.c        |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c b/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c
index 95eb5f6..d97f749 100644
--- a/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c
+++ b/src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c
@@ -696,7 +696,7 @@ fenced_buffer_map(struct pb_buffer *buf,
        * Don't wait for the GPU to finish accessing it, if blocking is forbidden.
        */
       if((flags & PIPE_BUFFER_USAGE_DONTBLOCK) &&
-          ops->fence_signalled(ops, fenced_buf->fence, 0) == 0) {
+          ops->fence_signalled(ops, fenced_buf->fence, 0) != 0) {
          goto done;
       }