Mesa (master): i915: Don't do the pitch expansion for tiled buffers.
Eric Anholt
anholt at kemper.freedesktop.org
Wed Mar 3 11:33:55 PST 2010
Module: Mesa
Branch: master
Commit: 07439cf61717a3bde82745aa2acc878d7fd0133f
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=07439cf61717a3bde82745aa2acc878d7fd0133f
Author: Eric Anholt <eric at anholt.net>
Date: Tue Mar 2 15:28:36 2010 -0800
i915: Don't do the pitch expansion for tiled buffers.
The weirdness that led to the bumping of pitch for those 512/1024
pixels is that in taking a 2x2 subspan or bilinear filtering we'd end
up hitting the same channel in 2 different pages, leading to lower
performance. With tiling, that doesn't occur, so we don't need to
waste the memory.
---
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index cb5a341..a20ea5a 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -238,11 +238,11 @@ int intel_miptree_pitch_align (struct intel_context *intel,
pitch = ALIGN(pitch * mt->cpp, pitch_align);
#ifdef I915
- /* XXX: At least the i915 seems very upset when the pitch is a multiple
- * of 1024 and sometimes 512 bytes - performance can drop by several
- * times. Go to the next multiple of the required alignment for now.
+ /* Do a little adjustment to linear allocations so that we avoid
+ * hitting the same channel of memory for 2 different pages when
+ * reading a 2x2 subspan or doing bilinear filtering.
*/
- if (!(pitch & 511) &&
+ if (tiling == I915_TILING_NONE && !(pitch & 511) &&
(pitch + pitch_align) < (1 << ctx->Const.MaxTextureLevels))
pitch += pitch_align;
#endif
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