Mesa (master): i965: Remove constant or ignored-by-hw args from FF sync message setup.

Eric Anholt anholt at kemper.freedesktop.org
Tue May 18 22:09:43 UTC 2010


Module: Mesa
Branch: master
Commit: 81951393e1e675d6ca3ea052875def70d5e7ab93
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=81951393e1e675d6ca3ea052875def70d5e7ab93

Author: Eric Anholt <eric at anholt.net>
Date:   Thu May 13 22:15:34 2010 -0700

i965: Remove constant or ignored-by-hw args from FF sync message setup.

---

 src/mesa/drivers/dri/i965/brw_clip_util.c |   19 ++++-------
 src/mesa/drivers/dri/i965/brw_eu.h        |    7 +---
 src/mesa/drivers/dri/i965/brw_eu_emit.c   |   51 +++++++++-------------------
 src/mesa/drivers/dri/i965/brw_gs_emit.c   |   19 ++++-------
 4 files changed, 32 insertions(+), 64 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_clip_util.c b/src/mesa/drivers/dri/i965/brw_clip_util.c
index 34a966a..a730664 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_util.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_util.c
@@ -370,18 +370,13 @@ void brw_clip_ff_sync(struct brw_clip_compile *c)
         need_ff_sync = brw_IF(p, BRW_EXECUTE_1);
         {
             brw_OR(p, c->reg.ff_sync, c->reg.ff_sync, brw_imm_ud(0x1));
-            brw_ff_sync(p, 
-                    c->reg.R0,
-                    0,
-                    c->reg.R0,
-                    1,	
-                    1,		/* used */
-                    1,  	/* msg length */
-                    1,		/* response length */
-                    0,		/* eot */
-                    1,		/* write compelete */
-                    0,		/* urb offset */
-                    BRW_URB_SWIZZLE_NONE);
+            brw_ff_sync(p,
+			c->reg.R0,
+			0,
+			c->reg.R0,
+			1, /* allocate */
+			1, /* response length */
+			0 /* eot */);
         }
         brw_ENDIF(p, need_ff_sync);
         brw_set_predicate_control(p, BRW_PREDICATE_NONE);
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index 4f55158..3a32ad2 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -822,13 +822,8 @@ void brw_ff_sync(struct brw_compile *p,
 		   GLuint msg_reg_nr,
 		   struct brw_reg src0,
 		   GLboolean allocate,
-		   GLboolean used,
-		   GLuint msg_length,
 		   GLuint response_length,
-		   GLboolean eot,
-		   GLboolean writes_complete,
-		   GLuint offset,
-		   GLuint swizzle);
+		   GLboolean eot);
 
 void brw_fb_WRITE(struct brw_compile *p,
 		   struct brw_reg dest,
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 785d382..175899b 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -280,28 +280,23 @@ static void brw_set_math_message( struct brw_context *brw,
 }
 
 
-static void brw_set_ff_sync_message( struct brw_context *brw,
-				 struct brw_instruction *insn,
-				 GLboolean allocate,
-				 GLboolean used,
-				 GLuint msg_length,
-				 GLuint response_length,
-				 GLboolean end_of_thread,
-				 GLboolean complete,
-				 GLuint offset,
-				 GLuint swizzle_control )
+static void brw_set_ff_sync_message(struct brw_context *brw,
+				    struct brw_instruction *insn,
+				    GLboolean allocate,
+				    GLuint response_length,
+				    GLboolean end_of_thread)
 {
 	brw_set_src1(insn, brw_imm_d(0));
 
-	insn->bits3.urb_gen5.opcode = 1;
-	insn->bits3.urb_gen5.offset = offset;
-	insn->bits3.urb_gen5.swizzle_control = swizzle_control;
+	insn->bits3.urb_gen5.opcode = 1; /* FF_SYNC */
+	insn->bits3.urb_gen5.offset = 0; /* Not used by FF_SYNC */
+	insn->bits3.urb_gen5.swizzle_control = 0; /* Not used by FF_SYNC */
 	insn->bits3.urb_gen5.allocate = allocate;
-	insn->bits3.urb_gen5.used = used;
-	insn->bits3.urb_gen5.complete = complete;
+	insn->bits3.urb_gen5.used = 0; /* Not used by FF_SYNC */
+	insn->bits3.urb_gen5.complete = 0; /* Not used by FF_SYNC */
 	insn->bits3.urb_gen5.header_present = 1;
-	insn->bits3.urb_gen5.response_length = response_length;
-	insn->bits3.urb_gen5.msg_length = msg_length;
+	insn->bits3.urb_gen5.response_length = response_length; /* may be 1 or 0 */
+	insn->bits3.urb_gen5.msg_length = 1;
 	insn->bits3.urb_gen5.end_of_thread = end_of_thread;
 	insn->bits2.send_gen5.sfid = BRW_MESSAGE_TARGET_URB;
 	insn->bits2.send_gen5.end_of_thread = end_of_thread;
@@ -1451,18 +1446,11 @@ void brw_ff_sync(struct brw_compile *p,
 		   GLuint msg_reg_nr,
 		   struct brw_reg src0,
 		   GLboolean allocate,
-		   GLboolean used,
-		   GLuint msg_length,
 		   GLuint response_length,
-		   GLboolean eot,
-		   GLboolean writes_complete,
-		   GLuint offset,
-		   GLuint swizzle)
+		   GLboolean eot)
 {
    struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND);
 
-   assert(msg_length < 16);
-
    brw_set_dest(insn, dest);
    brw_set_src0(insn, src0);
    brw_set_src1(insn, brw_imm_d(0));
@@ -1470,13 +1458,8 @@ void brw_ff_sync(struct brw_compile *p,
    insn->header.destreg__conditionalmod = msg_reg_nr;
 
    brw_set_ff_sync_message(p->brw,
-		       insn,
-		       allocate,
-		       used,
-		       msg_length,
-		       response_length, 
-		       eot, 
-		       writes_complete, 
-		       offset,
-		       swizzle);
+			   insn,
+			   allocate,
+			   response_length,
+			   eot);
 }
diff --git a/src/mesa/drivers/dri/i965/brw_gs_emit.c b/src/mesa/drivers/dri/i965/brw_gs_emit.c
index dd7b057..99a6f6b 100644
--- a/src/mesa/drivers/dri/i965/brw_gs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_gs_emit.c
@@ -104,18 +104,13 @@ static void brw_gs_ff_sync(struct brw_gs_compile *c, int num_prim)
 {
 	struct brw_compile *p = &c->func;
 	brw_MOV(p, get_element_ud(c->reg.R0, 1), brw_imm_ud(num_prim));
-	brw_ff_sync(p, 
-				c->reg.R0,
-				0,
-				c->reg.R0,
-				1,	
-				1,		/* used */
-				1,  	/* msg length */
-				1,		/* response length */
-				0,		/* eot */
-				1,		/* write compelete */
-				0,		/* urb offset */
-				BRW_URB_SWIZZLE_NONE);
+	brw_ff_sync(p,
+		    c->reg.R0,
+		    0,
+		    c->reg.R0,
+		    1, /* allocate */
+		    1, /* response length */
+		    0 /* eot */);
 }
 
 




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