Mesa (7.9): r600c: properly align mipmaps to group size
Alex Deucher
agd5f at kemper.freedesktop.org
Mon Nov 8 17:11:33 UTC 2010
Module: Mesa
Branch: 7.9
Commit: 773e8fadc8b19aaba5d13f75ac5810badb3968c4
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=773e8fadc8b19aaba5d13f75ac5810badb3968c4
Author: Alex Deucher <alexdeucher at gmail.com>
Date: Mon Nov 8 11:56:41 2010 -0500
r600c: properly align mipmaps to group size
fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=31400
---
.../drivers/dri/radeon/radeon_common_context.c | 6 +++---
src/mesa/drivers/dri/radeon/radeon_screen.c | 5 ++++-
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c
index 8804b9c..e1639ce 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c
@@ -251,9 +251,9 @@ GLboolean radeonInitContext(radeonContextPtr radeon,
radeon->texture_rect_row_align = 512;
radeon->texture_compressed_row_align = 512;
} else {
- radeon->texture_row_align = 256;
- radeon->texture_rect_row_align = 256;
- radeon->texture_compressed_row_align = 256;
+ radeon->texture_row_align = radeon->radeonScreen->group_bytes;
+ radeon->texture_rect_row_align = radeon->radeonScreen->group_bytes;
+ radeon->texture_compressed_row_align = radeon->radeonScreen->group_bytes;
}
} else if (IS_R200_CLASS(radeon->radeonScreen) ||
IS_R100_CLASS(radeon->radeonScreen)) {
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index 2ea77e5..0ca052d 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -1138,6 +1138,8 @@ radeonCreateScreen( __DRIscreen *sPriv )
else
screen->chip_flags |= RADEON_CLASS_R600;
+ /* set group bytes for r6xx+ */
+ screen->group_bytes = 256;
screen->cpp = dri_priv->bpp / 8;
screen->AGPMode = dri_priv->AGPMode;
@@ -1382,7 +1384,8 @@ radeonCreateScreen2(__DRIscreen *sPriv)
else
screen->chip_flags |= RADEON_CLASS_R600;
- /* r6xx+ tiling */
+ /* r6xx+ tiling, default to 256 group bytes */
+ screen->group_bytes = 256;
if (IS_R600_CLASS(screen) && (sPriv->drm_version.minor >= 6)) {
ret = radeonGetParam(sPriv, RADEON_INFO_TILE_CONFIG, &temp);
if (ret)
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