Mesa (master): i915g: s/hw_tiled/tiling
Jakob Bornecrantz
wallbraker at kemper.freedesktop.org
Sun Nov 21 15:58:04 UTC 2010
Module: Mesa
Branch: master
Commit: aba728eb255380ac3c73ba7c9a5ff40bd68705bf
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=aba728eb255380ac3c73ba7c9a5ff40bd68705bf
Author: Daniel Vetter <daniel.vetter at ffwll.ch>
Date: Fri Nov 19 23:38:19 2010 +0100
i915g: s/hw_tiled/tiling
More in line with other intel drivers.
Change to use enum by Jakob Bornecrantz.
Reviewed-by: Jakob Bornecrantz <wallbraker at gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Signed-off-by: Jakob Bornecrantz <wallbraker at gmail.com>
---
src/gallium/drivers/i915/i915_resource.h | 5 +++--
src/gallium/drivers/i915/i915_resource_texture.c | 8 ++++----
2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/i915/i915_resource.h b/src/gallium/drivers/i915/i915_resource.h
index 1f87f56..753bd26 100644
--- a/src/gallium/drivers/i915/i915_resource.h
+++ b/src/gallium/drivers/i915/i915_resource.h
@@ -32,6 +32,7 @@ struct i915_screen;
#include "util/u_transfer.h"
#include "util/u_debug.h"
+#include "i915_winsys.h"
struct i915_context;
@@ -52,12 +53,12 @@ struct i915_buffer {
struct i915_texture {
struct u_resource b;
+ /* tiling flags */
+ enum i915_winsys_buffer_tile tiling;
unsigned stride;
unsigned depth_stride; /* per-image on i945? */
unsigned total_nblocksy;
- unsigned hw_tiled; /**< tiled with hardware fences */
-
unsigned nr_images[I915_MAX_TEXTURE_2D_LEVELS];
/* Explicitly store the offset of each image for each cube face or
diff --git a/src/gallium/drivers/i915/i915_resource_texture.c b/src/gallium/drivers/i915/i915_resource_texture.c
index eb040fe..d45346b 100644
--- a/src/gallium/drivers/i915/i915_resource_texture.c
+++ b/src/gallium/drivers/i915/i915_resource_texture.c
@@ -165,7 +165,7 @@ i9x5_scanout_layout(struct i915_texture *tex)
if (pt->width0 >= 240) {
tex->stride = get_pot_stride(pt->format, pt->width0);
tex->total_nblocksy = align_nblocksy(pt->format, pt->height0, 8);
- tex->hw_tiled = I915_TILE_X;
+ tex->tiling = I915_TILE_X;
} else if (pt->width0 == 64 && pt->height0 == 64) {
tex->stride = get_pot_stride(pt->format, pt->width0);
tex->total_nblocksy = align_nblocksy(pt->format, pt->height0, 8);
@@ -202,7 +202,7 @@ i9x5_display_target_layout(struct i915_texture *tex)
tex->stride = get_pot_stride(pt->format, pt->width0);
tex->total_nblocksy = align_nblocksy(pt->format, pt->height0, 8);
- tex->hw_tiled = I915_TILE_X;
+ tex->tiling = I915_TILE_X;
#if DEBUG_TEXTURE
debug_printf("%s size: %d,%d,%d offset %d,%d (0x%x)\n", __FUNCTION__,
@@ -790,8 +790,8 @@ i915_texture_create(struct pipe_screen *screen,
goto fail;
/* setup any hw fences */
- if (tex->hw_tiled) {
- iws->buffer_set_fence_reg(iws, tex->buffer, tex->stride, tex->hw_tiled);
+ if (tex->tiling) {
+ iws->buffer_set_fence_reg(iws, tex->buffer, tex->stride, tex->tiling);
}
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