Mesa (master): i965: Fix gl_FrontFacing emit on pre-gen6.

[Eric Anholt]

Module: Mesa
Branch: master
Commit: 7a3f113e79f983222ecc95c33655a8c9354fcfad
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7a3f113e79f983222ecc95c33655a8c9354fcfad

Author: Eric Anholt <eric at anholt.net>
Date:   Wed Oct 20 15:21:53 2010 -0700

i965: Fix gl_FrontFacing emit on pre-gen6.

It's amazing this code worked.  Basically, we would get lucky in
register allocation and the tests using frontfacing would happen to
allocate gl_FrontFacing storage and the instructions generating
gl_FrontFacing but pointing at another register to the same hardware
register.  Noticed during register spilling debug, when suddenly they
didn't get allocatd the same storage.

---

 src/mesa/drivers/dri/i965/brw_fs.cpp |    1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 5c5e383..bc39d1c 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -503,7 +503,6 @@ fs_visitor::emit_frontfacing_interpolation(ir_variable *ir)
 		   *reg,
 		   fs_reg(1)));
    } else {
-      fs_reg *reg = new(this->mem_ctx) fs_reg(this, ir->type);
       struct brw_reg r1_6ud = retype(brw_vec1_grf(1, 6), BRW_REGISTER_TYPE_UD);
       /* bit 31 is "primitive is back face", so checking < (1 << 31) gives
        * us front face