Mesa (master): r600g: split opcodes out and add wrapper around usage.
Dave Airlie
airlied at kemper.freedesktop.org
Tue Sep 7 22:51:20 UTC 2010
Module: Mesa
Branch: master
Commit: a3a94554f5a12f0626d9712ddcdc81b1e21d36c2
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a3a94554f5a12f0626d9712ddcdc81b1e21d36c2
Author: Dave Airlie <airlied at redhat.com>
Date: Wed Sep 8 08:49:00 2010 +1000
r600g: split opcodes out and add wrapper around usage.
This splits the r600 opcodes out of the sq file and adds a wrapper
so we can convert to evergreen opcodes later without touching these functions
too much.
---
src/gallium/drivers/r600/r600_asm.c | 1 +
src/gallium/drivers/r600/r600_opcodes.h | 178 +++++++++++++++++++++++++++++++
src/gallium/drivers/r600/r600_shader.c | 107 +++++++++---------
src/gallium/drivers/r600/r600_sq.h | 155 ---------------------------
4 files changed, 233 insertions(+), 208 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c
index b62354f..13a44c8 100644
--- a/src/gallium/drivers/r600/r600_asm.c
+++ b/src/gallium/drivers/r600/r600_asm.c
@@ -24,6 +24,7 @@
#include "r600_context.h"
#include "util/u_memory.h"
#include "r600_sq.h"
+#include "r600_opcodes.h"
#include <stdio.h>
#include <errno.h>
diff --git a/src/gallium/drivers/r600/r600_opcodes.h b/src/gallium/drivers/r600/r600_opcodes.h
new file mode 100644
index 0000000..ae3d46e
--- /dev/null
+++ b/src/gallium/drivers/r600/r600_opcodes.h
@@ -0,0 +1,178 @@
+
+#ifndef R600_OPCODES_H
+#define R600_OPCODES_H
+
+#define V_SQ_CF_WORD1_SQ_CF_INST_NOP 0x00000000
+#define V_SQ_CF_WORD1_SQ_CF_INST_TEX 0x00000001
+#define V_SQ_CF_WORD1_SQ_CF_INST_VTX 0x00000002
+#define V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC 0x00000003
+#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START 0x00000004
+#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END 0x00000005
+#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_DX10 0x00000006
+#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL 0x00000007
+#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE 0x00000008
+#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK 0x00000009
+#define V_SQ_CF_WORD1_SQ_CF_INST_JUMP 0x0000000A
+#define V_SQ_CF_WORD1_SQ_CF_INST_PUSH 0x0000000B
+#define V_SQ_CF_WORD1_SQ_CF_INST_PUSH_ELSE 0x0000000C
+#define V_SQ_CF_WORD1_SQ_CF_INST_ELSE 0x0000000D
+#define V_SQ_CF_WORD1_SQ_CF_INST_POP 0x0000000E
+#define V_SQ_CF_WORD1_SQ_CF_INST_POP_JUMP 0x0000000F
+#define V_SQ_CF_WORD1_SQ_CF_INST_POP_PUSH 0x00000010
+#define V_SQ_CF_WORD1_SQ_CF_INST_POP_PUSH_ELSE 0x00000011
+#define V_SQ_CF_WORD1_SQ_CF_INST_CALL 0x00000012
+#define V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS 0x00000013
+#define V_SQ_CF_WORD1_SQ_CF_INST_RETURN 0x00000014
+#define V_SQ_CF_WORD1_SQ_CF_INST_EMIT_VERTEX 0x00000015
+#define V_SQ_CF_WORD1_SQ_CF_INST_EMIT_CUT_VERTEX 0x00000016
+#define V_SQ_CF_WORD1_SQ_CF_INST_CUT_VERTEX 0x00000017
+#define V_SQ_CF_WORD1_SQ_CF_INST_KILL 0x00000018
+
+#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU 0x00000008
+#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE 0x00000009
+#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER 0x0000000A
+#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER 0x0000000B
+#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_CONTINUE 0x0000000D
+#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_BREAK 0x0000000E
+#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_ELSE_AFTER 0x0000000F
+
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD 0x00000000
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL 0x00000001
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL_IEEE 0x00000002
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX 0x00000003
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN 0x00000004
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_DX10 0x00000005
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_DX10 0x00000006
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE 0x00000008
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT 0x00000009
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE 0x0000000A
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE 0x0000000B
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE_DX10 0x0000000C
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_DX10 0x0000000D
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_DX10 0x0000000E
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE_DX10 0x0000000F
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT 0x00000010
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC 0x00000011
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CEIL 0x00000012
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE 0x00000013
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR 0x00000014
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA 0x00000015
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_FLOOR 0x00000016
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT 0x00000018
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV 0x00000019
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP 0x0000001A
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_UINT 0x0000001E
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_UINT 0x0000001F
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE 0x00000020
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT 0x00000021
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE 0x00000022
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE 0x00000023
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_INV 0x00000024
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_POP 0x00000025
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_CLR 0x00000026
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_RESTORE 0x00000027
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_PUSH 0x00000028
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_PUSH 0x00000029
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_PUSH 0x0000002A
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH 0x0000002B
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE 0x0000002C
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT 0x0000002D
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE 0x0000002E
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE 0x0000002F
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_AND_INT 0x00000030
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_OR_INT 0x00000031
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_XOR_INT 0x00000032
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOT_INT 0x00000033
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT 0x00000034
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT 0x00000035
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_INT 0x00000036
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_INT 0x00000037
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_UINT 0x00000038
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_UINT 0x00000039
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE_INT 0x0000003A
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_INT 0x0000003B
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_INT 0x0000003C
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE_INT 0x0000003D
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_UINT 0x0000003E
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_UINT 0x0000003F
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_UINT 0x00000040
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_UINT 0x00000041
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_INT 0x00000042
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_INT 0x00000043
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_INT 0x00000044
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT 0x00000045
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE_INT 0x00000046
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_INT 0x00000047
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_INT 0x00000048
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE_INT 0x00000049
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_PUSH_INT 0x0000004A
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_PUSH_INT 0x0000004B
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_PUSH_INT 0x0000004C
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH_INT 0x0000004D
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLT_PUSH_INT 0x0000004E
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLE_PUSH_INT 0x0000004F
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4 0x00000050
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4_IEEE 0x00000051
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE 0x00000052
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX4 0x00000053
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_GPR_INT 0x00000060
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE 0x00000061
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_CLAMPED 0x00000062
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE 0x00000063
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_CLAMPED 0x00000064
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_FF 0x00000065
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE 0x00000066
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_CLAMPED 0x00000067
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_FF 0x00000068
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_IEEE 0x00000069
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SQRT_IEEE 0x0000006A
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT 0x0000006B
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT 0x0000006C
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT 0x0000006D
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN 0x0000006E
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS 0x0000006F
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT 0x00000070
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHR_INT 0x00000071
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHL_INT 0x00000072
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_INT 0x00000073
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_INT 0x00000074
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT 0x00000075
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT 0x00000076
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_INT 0x00000077
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_UINT 0x00000078
+#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT 0x00000079
+
+#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT 0x0000000C
+#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT_M2 0x0000000D
+#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT_M4 0x0000000E
+#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT_D2 0x0000000F
+#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD 0x00000010
+#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_M2 0x00000011
+#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_M4 0x00000012
+#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_D2 0x00000013
+#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_IEEE 0x00000014
+#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_IEEE_M2 0x00000015
+#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_IEEE_M4 0x00000016
+#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_IEEE_D2 0x00000017
+#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDE 0x00000018
+#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT 0x00000019
+#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE 0x0000001A
+#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDE_INT 0x0000001C
+#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT_INT 0x0000001D
+#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE_INT 0x0000001E
+
+#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM0 0x00000020
+#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM1 0x00000021
+#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM2 0x00000022
+#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_STREAM3 0x00000023
+#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_SCRATCH 0x00000024
+#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_REDUCTION 0x00000025
+#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_MEM_RING 0x00000026
+#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT 0x00000027
+#define V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE 0x00000028
+
+#define BC_INST(bc, x) (x)
+
+#define CTX_INST(x) (x)
+
+#endif
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index b643157..78f4039 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -30,6 +30,7 @@
#include "r600_shader.h"
#include "r600_asm.h"
#include "r600_sq.h"
+#include "r600_opcodes.h"
#include "r600d.h"
#include <stdio.h>
#include <errno.h>
@@ -416,7 +417,7 @@ int r600_shader_from_tgsi(const struct tgsi_token *tokens, struct r600_shader *s
output[i].barrier = 1;
output[i].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM;
output[i].array_base = i - pos0;
- output[i].inst = V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT;
+ output[i].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT);
switch (ctx.type) {
case TGSI_PROCESSOR_VERTEX:
if (shader->output[i].name == TGSI_SEMANTIC_POSITION) {
@@ -488,7 +489,7 @@ int r600_shader_from_tgsi(const struct tgsi_token *tokens, struct r600_shader *s
output[0].barrier = 1;
output[0].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
output[0].array_base = 0;
- output[0].inst = V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT;
+ output[0].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT);
noutput++;
}
/* set export done on last export of each type */
@@ -498,7 +499,7 @@ int r600_shader_from_tgsi(const struct tgsi_token *tokens, struct r600_shader *s
}
if (!(output_done & (1 << output[i].type))) {
output_done |= (1 << output[i].type);
- output[i].inst = V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE;
+ output[i].inst = BC_INST(ctx.bc, V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE);
}
}
/* add output to bytecode */
@@ -604,7 +605,7 @@ static int tgsi_split_constant(struct r600_shader_ctx *ctx, struct r600_bc_alu_s
int treg = r600_get_temp(ctx);
for (k = 0; k < 4; k++) {
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
alu.src[0].sel = r600_src[j].sel;
alu.src[0].chan = k;
alu.dst.sel = treg;
@@ -640,7 +641,7 @@ static int tgsi_split_literal_constant(struct r600_shader_ctx *ctx, struct r600_
int treg = r600_get_temp(ctx);
for (k = 0; k < 4; k++) {
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
alu.src[0].sel = r600_src[j].sel;
alu.src[0].chan = k;
alu.dst.sel = treg;
@@ -758,7 +759,7 @@ static int tgsi_setup_trig(struct r600_shader_ctx *ctx,
lit_vals[1] = fui(0.5f);
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD);
alu.is_op3 = 1;
alu.dst.chan = 0;
@@ -781,7 +782,7 @@ static int tgsi_setup_trig(struct r600_shader_ctx *ctx,
return r;
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT);
alu.dst.chan = 0;
alu.dst.sel = ctx->temp_reg;
@@ -803,7 +804,7 @@ static int tgsi_setup_trig(struct r600_shader_ctx *ctx,
}
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD);
alu.is_op3 = 1;
alu.dst.chan = 0;
@@ -862,7 +863,7 @@ static int tgsi_trig(struct r600_shader_ctx *ctx)
continue;
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
alu.src[0].sel = ctx->temp_reg;
r = tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
@@ -891,7 +892,7 @@ static int tgsi_scs(struct r600_shader_ctx *ctx)
/* dst.x = COS */
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS);
r = tgsi_dst(ctx, &inst->Dst[0], 0, &alu.dst);
if (r)
return r;
@@ -905,7 +906,7 @@ static int tgsi_scs(struct r600_shader_ctx *ctx)
/* dst.y = SIN */
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN);
r = tgsi_dst(ctx, &inst->Dst[0], 1, &alu.dst);
if (r)
return r;
@@ -975,7 +976,7 @@ static int tgsi_lit(struct r600_shader_ctx *ctx)
/* dst.x, <- 1.0 */
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
alu.src[0].sel = V_SQ_ALU_SRC_1; /*1.0*/
alu.src[0].chan = 0;
r = tgsi_dst(ctx, &inst->Dst[0], 0, &alu.dst);
@@ -988,7 +989,7 @@ static int tgsi_lit(struct r600_shader_ctx *ctx)
/* dst.y = max(src.x, 0.0) */
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX);
alu.src[0] = r600_src[0];
alu.src[1].sel = V_SQ_ALU_SRC_0; /*0.0*/
alu.src[1].chan = 0;
@@ -1002,7 +1003,7 @@ static int tgsi_lit(struct r600_shader_ctx *ctx)
/* dst.w, <- 1.0 */
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
alu.src[0].sel = V_SQ_ALU_SRC_1;
alu.src[0].chan = 0;
r = tgsi_dst(ctx, &inst->Dst[0], 3, &alu.dst);
@@ -1025,7 +1026,7 @@ static int tgsi_lit(struct r600_shader_ctx *ctx)
/* dst.z = log(src.y) */
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_CLAMPED;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_CLAMPED);
alu.src[0] = r600_src[0];
alu.src[0].chan = tgsi_chan(&inst->Src[0], 1);
r = tgsi_dst(ctx, &inst->Dst[0], 2, &alu.dst);
@@ -1045,7 +1046,7 @@ static int tgsi_lit(struct r600_shader_ctx *ctx)
/* tmp.x = amd MUL_LIT(src.w, dst.z, src.x ) */
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT);
alu.src[0] = r600_src[0];
alu.src[0].chan = tgsi_chan(&inst->Src[0], 3);
alu.src[1].sel = sel;
@@ -1067,7 +1068,7 @@ static int tgsi_lit(struct r600_shader_ctx *ctx)
return r;
/* dst.z = exp(tmp.x) */
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE);
alu.src[0].sel = ctx->temp_reg;
alu.src[0].chan = 0;
r = tgsi_dst(ctx, &inst->Dst[0], 2, &alu.dst);
@@ -1118,7 +1119,7 @@ static int tgsi_helper_tempx_replicate(struct r600_shader_ctx *ctx)
for (i = 0; i < 4; i++) {
memset(&alu, 0, sizeof(struct r600_bc_alu));
alu.src[0].sel = ctx->temp_reg;
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
alu.dst.chan = i;
r = tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
if (r)
@@ -1168,7 +1169,7 @@ static int tgsi_pow(struct r600_shader_ctx *ctx)
/* LOG2(a) */
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE);
r = tgsi_src(ctx, &inst->Src[0], &alu.src[0]);
if (r)
return r;
@@ -1184,7 +1185,7 @@ static int tgsi_pow(struct r600_shader_ctx *ctx)
return r;
/* b * LOG2(a) */
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL_IEEE;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL_IEEE);
r = tgsi_src(ctx, &inst->Src[1], &alu.src[0]);
if (r)
return r;
@@ -1201,7 +1202,7 @@ static int tgsi_pow(struct r600_shader_ctx *ctx)
return r;
/* POW(a,b) = EXP2(b * LOG2(a))*/
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE);
alu.src[0].sel = ctx->temp_reg;
alu.dst.sel = ctx->temp_reg;
alu.dst.write = 1;
@@ -1229,7 +1230,7 @@ static int tgsi_ssg(struct r600_shader_ctx *ctx)
/* tmp = (src > 0 ? 1 : src) */
for (i = 0; i < 4; i++) {
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT);
alu.is_op3 = 1;
alu.dst.sel = ctx->temp_reg;
@@ -1255,7 +1256,7 @@ static int tgsi_ssg(struct r600_shader_ctx *ctx)
/* dst = (-tmp > 0 ? -1 : tmp) */
for (i = 0; i < 4; i++) {
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT);
alu.is_op3 = 1;
r = tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
if (r)
@@ -1291,10 +1292,10 @@ static int tgsi_helper_copy(struct r600_shader_ctx *ctx, struct tgsi_full_instru
for (i = 0; i < 4; i++) {
memset(&alu, 0, sizeof(struct r600_bc_alu));
if (!(inst->Dst[0].Register.WriteMask & (1 << i))) {
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP);
alu.dst.chan = i;
} else {
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
r = tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
if (r)
return r;
@@ -1413,7 +1414,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
if (inst->Instruction.Opcode == TGSI_OPCODE_TXP) {
/* Add perspective divide */
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE);
r = tgsi_src(ctx, &inst->Src[0], &alu.src[0]);
if (r)
return r;
@@ -1429,7 +1430,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
for (i = 0; i < 3; i++) {
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL);
alu.src[0].sel = ctx->temp_reg;
alu.src[0].chan = 3;
r = tgsi_src(ctx, &inst->Src[0], &alu.src[1]);
@@ -1444,7 +1445,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
return r;
}
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
alu.src[0].sel = V_SQ_ALU_SRC_1;
alu.src[0].chan = 0;
alu.dst.sel = ctx->temp_reg;
@@ -1464,7 +1465,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
/* tmp1.xyzw = CUBE(R0.zzxy, R0.yxzz) */
for (i = 0; i < 4; i++) {
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE);
switch (i) {
case 0:
src_chan = 2;
@@ -1503,7 +1504,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
/* tmp1.z = RCP_e(|tmp1.z|) */
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE);
alu.src[0].sel = ctx->temp_reg;
alu.src[0].chan = 2;
alu.src[0].abs = 1;
@@ -1520,7 +1521,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
* muladd has no writemask, have to use another temp
*/
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD);
alu.is_op3 = 1;
alu.src[0].sel = ctx->temp_reg;
@@ -1540,7 +1541,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
return r;
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD);
alu.is_op3 = 1;
alu.src[0].sel = ctx->temp_reg;
@@ -1572,7 +1573,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
if (src_not_temp) {
for (i = 0; i < 4; i++) {
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
alu.src[0].sel = src_gpr;
alu.src[0].chan = i;
alu.dst.sel = ctx->temp_reg;
@@ -1647,7 +1648,7 @@ static int tgsi_lrp(struct r600_shader_ctx *ctx)
/* 1 - src0 */
for (i = 0; i < 4; i++) {
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD);
alu.src[0].sel = V_SQ_ALU_SRC_1;
alu.src[0].chan = 0;
alu.src[1] = r600_src[0];
@@ -1670,7 +1671,7 @@ static int tgsi_lrp(struct r600_shader_ctx *ctx)
/* (1 - src0) * src2 */
for (i = 0; i < 4; i++) {
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL);
alu.src[0].sel = ctx->temp_reg;
alu.src[0].chan = i;
alu.src[1] = r600_src[2];
@@ -1692,7 +1693,7 @@ static int tgsi_lrp(struct r600_shader_ctx *ctx)
/* src0 * src1 + (1 - src0) * src2 */
for (i = 0; i < 4; i++) {
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD);
alu.is_op3 = 1;
alu.src[0] = r600_src[0];
alu.src[0].chan = tgsi_chan(&inst->Src[0], i);
@@ -1729,7 +1730,7 @@ static int tgsi_cmp(struct r600_shader_ctx *ctx)
for (i = 0; i < 4; i++) {
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE);
alu.src[0] = r600_src[0];
alu.src[0].chan = tgsi_chan(&inst->Src[0], i);
@@ -1777,7 +1778,7 @@ static int tgsi_xpd(struct r600_shader_ctx *ctx)
for (i = 0; i < 4; i++) {
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL);
alu.src[0] = r600_src[0];
switch (i) {
@@ -1824,7 +1825,7 @@ static int tgsi_xpd(struct r600_shader_ctx *ctx)
for (i = 0; i < 4; i++) {
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD);
alu.src[0] = r600_src[0];
switch (i) {
@@ -1894,7 +1895,7 @@ static int tgsi_exp(struct r600_shader_ctx *ctx)
if (inst->Dst[0].Register.WriteMask & 1) {
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR);
r = tgsi_src(ctx, &inst->Src[0], &alu.src[0]);
if (r)
return r;
@@ -1913,7 +1914,7 @@ static int tgsi_exp(struct r600_shader_ctx *ctx)
if (r)
return r;
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE);
alu.src[0].sel = ctx->temp_reg;
alu.src[0].chan = 0;
@@ -1934,7 +1935,7 @@ static int tgsi_exp(struct r600_shader_ctx *ctx)
if ((inst->Dst[0].Register.WriteMask >> 1) & 1) {
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT);
alu.src[0] = r600_src[0];
r = tgsi_src(ctx, &inst->Src[0], &alu.src[0]);
if (r)
@@ -1961,7 +1962,7 @@ static int tgsi_exp(struct r600_shader_ctx *ctx)
/* result.z = RoughApprox2ToX(tmp);*/
if ((inst->Dst[0].Register.WriteMask >> 2) & 0x1) {
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE);
r = tgsi_src(ctx, &inst->Src[0], &alu.src[0]);
if (r)
return r;
@@ -1985,7 +1986,7 @@ static int tgsi_exp(struct r600_shader_ctx *ctx)
if ((inst->Dst[0].Register.WriteMask >> 3) & 0x1) {
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV);
alu.src[0].sel = V_SQ_ALU_SRC_1;
alu.src[0].chan = 0;
@@ -2020,7 +2021,7 @@ static int tgsi_arl(struct r600_shader_ctx *ctx)
alu.last = 1;
- r = r600_bc_add_alu_type(ctx->bc, &alu, V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU);
+ r = r600_bc_add_alu_type(ctx->bc, &alu, CTX_INST(V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU));
if (r)
return r;
return 0;
@@ -2035,7 +2036,7 @@ static int tgsi_opdst(struct r600_shader_ctx *ctx)
for (i = 0; i < 4; i++) {
memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL;
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL);
r = tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst);
if (r)
return r;
@@ -2089,7 +2090,7 @@ static int emit_logic_pred(struct r600_shader_ctx *ctx, int opcode)
alu.last = 1;
- r = r600_bc_add_alu_type(ctx->bc, &alu, V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE);
+ r = r600_bc_add_alu_type(ctx->bc, &alu, CTX_INST(V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE));
if (r)
return r;
return 0;
@@ -2097,7 +2098,7 @@ static int emit_logic_pred(struct r600_shader_ctx *ctx, int opcode)
static int pops(struct r600_shader_ctx *ctx, int pops)
{
- r600_bc_add_cfinst(ctx->bc, V_SQ_CF_WORD1_SQ_CF_INST_POP);
+ r600_bc_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_POP));
ctx->bc->cf_last->pop_count = pops;
return 0;
}
@@ -2238,9 +2239,9 @@ static void break_loop_on_flag(struct r600_shader_ctx *ctx, unsigned fc_sp)
static int tgsi_if(struct r600_shader_ctx *ctx)
{
- emit_logic_pred(ctx, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE);
+ emit_logic_pred(ctx, CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE));
- r600_bc_add_cfinst(ctx->bc, V_SQ_CF_WORD1_SQ_CF_INST_JUMP);
+ r600_bc_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_JUMP));
fc_pushlevel(ctx, FC_IF);
@@ -2250,7 +2251,7 @@ static int tgsi_if(struct r600_shader_ctx *ctx)
static int tgsi_else(struct r600_shader_ctx *ctx)
{
- r600_bc_add_cfinst(ctx->bc, V_SQ_CF_WORD1_SQ_CF_INST_ELSE);
+ r600_bc_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_ELSE));
ctx->bc->cf_last->pop_count = 1;
fc_set_mid(ctx, ctx->bc->fc_sp);
@@ -2280,7 +2281,7 @@ static int tgsi_endif(struct r600_shader_ctx *ctx)
static int tgsi_bgnloop(struct r600_shader_ctx *ctx)
{
- r600_bc_add_cfinst(ctx->bc, V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL);
+ r600_bc_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL));
fc_pushlevel(ctx, FC_LOOP);
@@ -2293,7 +2294,7 @@ static int tgsi_endloop(struct r600_shader_ctx *ctx)
{
int i;
- r600_bc_add_cfinst(ctx->bc, V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END);
+ r600_bc_add_cfinst(ctx->bc, CTX_INST(V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END));
if (ctx->bc->fc_stack[ctx->bc->fc_sp].type != FC_LOOP) {
R600_ERR("loop/endloop in shader code are not paired.\n");
diff --git a/src/gallium/drivers/r600/r600_sq.h b/src/gallium/drivers/r600/r600_sq.h
index fa7a317..1542059 100644
--- a/src/gallium/drivers/r600/r600_sq.h
+++ b/src/gallium/drivers/r600/r600_sq.h
@@ -55,31 +55,6 @@
#define S_SQ_CF_WORD1_CF_INST(x) (((x) & 0x7F) << 23)
#define G_SQ_CF_WORD1_CF_INST(x) (((x) >> 23) & 0x7F)
#define C_SQ_CF_WORD1_CF_INST 0xC07FFFFF
-#define V_SQ_CF_WORD1_SQ_CF_INST_NOP 0x00000000
-#define V_SQ_CF_WORD1_SQ_CF_INST_TEX 0x00000001
-#define V_SQ_CF_WORD1_SQ_CF_INST_VTX 0x00000002
-#define V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC 0x00000003
-#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START 0x00000004
-#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END 0x00000005
-#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_DX10 0x00000006
-#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL 0x00000007
-#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE 0x00000008
-#define V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK 0x00000009
-#define V_SQ_CF_WORD1_SQ_CF_INST_JUMP 0x0000000A
-#define V_SQ_CF_WORD1_SQ_CF_INST_PUSH 0x0000000B
-#define V_SQ_CF_WORD1_SQ_CF_INST_PUSH_ELSE 0x0000000C
-#define V_SQ_CF_WORD1_SQ_CF_INST_ELSE 0x0000000D
-#define V_SQ_CF_WORD1_SQ_CF_INST_POP 0x0000000E
-#define V_SQ_CF_WORD1_SQ_CF_INST_POP_JUMP 0x0000000F
-#define V_SQ_CF_WORD1_SQ_CF_INST_POP_PUSH 0x00000010
-#define V_SQ_CF_WORD1_SQ_CF_INST_POP_PUSH_ELSE 0x00000011
-#define V_SQ_CF_WORD1_SQ_CF_INST_CALL 0x00000012
-#define V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS 0x00000013
-#define V_SQ_CF_WORD1_SQ_CF_INST_RETURN 0x00000014
-#define V_SQ_CF_WORD1_SQ_CF_INST_EMIT_VERTEX 0x00000015
-#define V_SQ_CF_WORD1_SQ_CF_INST_EMIT_CUT_VERTEX 0x00000016
-#define V_SQ_CF_WORD1_SQ_CF_INST_CUT_VERTEX 0x00000017
-#define V_SQ_CF_WORD1_SQ_CF_INST_KILL 0x00000018
#define S_SQ_CF_WORD1_WHOLE_QUAD_MODE(x) (((x) & 0x1) << 30)
#define G_SQ_CF_WORD1_WHOLE_QUAD_MODE(x) (((x) >> 30) & 0x1)
#define C_SQ_CF_WORD1_WHOLE_QUAD_MODE 0xBFFFFFFF
@@ -118,13 +93,6 @@
#define S_SQ_CF_ALU_WORD1_CF_INST(x) (((x) & 0xF) << 26)
#define G_SQ_CF_ALU_WORD1_CF_INST(x) (((x) >> 26) & 0xF)
#define C_SQ_CF_ALU_WORD1_CF_INST 0xC3FFFFFF
-#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU 0x00000008
-#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE 0x00000009
-#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER 0x0000000A
-#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER 0x0000000B
-#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_CONTINUE 0x0000000D
-#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_BREAK 0x0000000E
-#define V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_ELSE_AFTER 0x0000000F
#define S_SQ_CF_ALU_WORD1_WHOLE_QUAD_MODE(x) (((x) & 0x1) << 30)
#define G_SQ_CF_ALU_WORD1_WHOLE_QUAD_MODE(x) (((x) >> 30) & 0x1)
#define C_SQ_CF_ALU_WORD1_WHOLE_QUAD_MODE 0xBFFFFFFF
@@ -300,111 +268,6 @@
#define S_SQ_ALU_WORD1_OP2_ALU_INST(x) (((x) & 0x3FF) << 8)
#define G_SQ_ALU_WORD1_OP2_ALU_INST(x) (((x) >> 8) & 0x3FF)
#define C_SQ_ALU_WORD1_OP2_ALU_INST 0xFFFC00FF
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD 0x00000000
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL 0x00000001
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL_IEEE 0x00000002
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX 0x00000003
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN 0x00000004
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_DX10 0x00000005
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_DX10 0x00000006
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE 0x00000008
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT 0x00000009
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE 0x0000000A
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE 0x0000000B
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE_DX10 0x0000000C
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_DX10 0x0000000D
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_DX10 0x0000000E
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE_DX10 0x0000000F
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT 0x00000010
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC 0x00000011
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CEIL 0x00000012
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE 0x00000013
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR 0x00000014
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA 0x00000015
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_FLOOR 0x00000016
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT 0x00000018
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV 0x00000019
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP 0x0000001A
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_UINT 0x0000001E
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_UINT 0x0000001F
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE 0x00000020
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT 0x00000021
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE 0x00000022
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE 0x00000023
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_INV 0x00000024
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_POP 0x00000025
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_CLR 0x00000026
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SET_RESTORE 0x00000027
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_PUSH 0x00000028
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_PUSH 0x00000029
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_PUSH 0x0000002A
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH 0x0000002B
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE 0x0000002C
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT 0x0000002D
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE 0x0000002E
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE 0x0000002F
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_AND_INT 0x00000030
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_OR_INT 0x00000031
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_XOR_INT 0x00000032
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOT_INT 0x00000033
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD_INT 0x00000034
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SUB_INT 0x00000035
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_INT 0x00000036
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_INT 0x00000037
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX_UINT 0x00000038
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN_UINT 0x00000039
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE_INT 0x0000003A
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_INT 0x0000003B
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_INT 0x0000003C
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE_INT 0x0000003D
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT_UINT 0x0000003E
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE_UINT 0x0000003F
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_UINT 0x00000040
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_UINT 0x00000041
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_INT 0x00000042
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_INT 0x00000043
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_INT 0x00000044
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_INT 0x00000045
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE_INT 0x00000046
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT_INT 0x00000047
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE_INT 0x00000048
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE_INT 0x00000049
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE_PUSH_INT 0x0000004A
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT_PUSH_INT 0x0000004B
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE_PUSH_INT 0x0000004C
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE_PUSH_INT 0x0000004D
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLT_PUSH_INT 0x0000004E
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETLE_PUSH_INT 0x0000004F
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4 0x00000050
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4_IEEE 0x00000051
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE 0x00000052
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX4 0x00000053
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_GPR_INT 0x00000060
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE 0x00000061
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_CLAMPED 0x00000062
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE 0x00000063
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_CLAMPED 0x00000064
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_FF 0x00000065
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE 0x00000066
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_CLAMPED 0x00000067
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_FF 0x00000068
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_IEEE 0x00000069
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SQRT_IEEE 0x0000006A
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT 0x0000006B
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT 0x0000006C
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_UINT_TO_FLT 0x0000006D
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN 0x0000006E
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS 0x0000006F
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ASHR_INT 0x00000070
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHR_INT 0x00000071
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LSHL_INT 0x00000072
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_INT 0x00000073
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_INT 0x00000074
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULLO_UINT 0x00000075
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MULHI_UINT 0x00000076
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_INT 0x00000077
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_UINT 0x00000078
-#define V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_UINT 0x00000079
#define P_SQ_ALU_WORD1_OP3
#define S_SQ_ALU_WORD1_OP3_SRC2_SEL(x) (((x) & 0x1FF) << 0)
#define G_SQ_ALU_WORD1_OP3_SRC2_SEL(x) (((x) >> 0) & 0x1FF)
@@ -421,24 +284,6 @@
#define S_SQ_ALU_WORD1_OP3_ALU_INST(x) (((x) & 0x1F) << 13)
#define G_SQ_ALU_WORD1_OP3_ALU_INST(x) (((x) >> 13) & 0x1F)
#define C_SQ_ALU_WORD1_OP3_ALU_INST 0xFFFC1FFF
-#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT 0x0000000C
-#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT_M2 0x0000000D
-#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT_M4 0x0000000E
-#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MUL_LIT_D2 0x0000000F
-#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD 0x00000010
-#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_M2 0x00000011
-#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_M4 0x00000012
-#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_D2 0x00000013
-#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_IEEE 0x00000014
-#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_IEEE_M2 0x00000015
-#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_IEEE_M4 0x00000016
-#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD_IEEE_D2 0x00000017
-#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDE 0x00000018
-#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT 0x00000019
-#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE 0x0000001A
-#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDE_INT 0x0000001C
-#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT_INT 0x0000001D
-#define V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGE_INT 0x0000001E
#define P_SQ_VTX_WORD0
#define S_SQ_VTX_WORD0_VTX_INST(x) (((x) & 0x1F) << 0)
#define G_SQ_VTX_WORD0_VTX_INST(x) (((x) >> 0) & 0x1F)
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