Mesa (master): r600g: Honour destination operand' s writemask in the SCS implementation.
Tilman Sauerbeck
tilman at kemper.freedesktop.org
Mon Sep 20 19:44:46 UTC 2010
Module: Mesa
Branch: master
Commit: 57bf96b43be2abcbadc387d7b5466b772125a093
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=57bf96b43be2abcbadc387d7b5466b772125a093
Author: Tilman Sauerbeck <tilman at code-monkey.de>
Date: Sun Sep 19 10:06:34 2010 +0200
r600g: Honour destination operand's writemask in the SCS implementation.
If we are not going to write to the X or Y components of the destination
vector we also don't need to prepare to compute SIN or COS.
Signed-off-by: Tilman Sauerbeck <tilman at code-monkey.de>
---
src/gallium/drivers/r600/r600_shader.c | 61 ++++++++++++++++++-------------
1 files changed, 35 insertions(+), 26 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index bce5297..523b6d2 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -926,38 +926,47 @@ static int tgsi_scs(struct r600_shader_ctx *ctx)
struct r600_bc_alu alu;
int r;
- r = tgsi_setup_trig(ctx, r600_src);
- if (r)
- return r;
-
+ /* We'll only need the trig stuff if we are going to write to the
+ * X or Y components of the destination vector.
+ */
+ if (likely(inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XY)) {
+ r = tgsi_setup_trig(ctx, r600_src);
+ if (r)
+ return r;
+ }
/* dst.x = COS */
- memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS);
- r = tgsi_dst(ctx, &inst->Dst[0], 0, &alu.dst);
- if (r)
- return r;
+ if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
+ memset(&alu, 0, sizeof(struct r600_bc_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS);
+ r = tgsi_dst(ctx, &inst->Dst[0], 0, &alu.dst);
+ if (r)
+ return r;
- alu.src[0].sel = ctx->temp_reg;
- alu.src[0].chan = 0;
- alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
- if (r)
- return r;
+ alu.src[0].sel = ctx->temp_reg;
+ alu.src[0].chan = 0;
+ alu.last = 1;
+ r = r600_bc_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
+ }
/* dst.y = SIN */
- memset(&alu, 0, sizeof(struct r600_bc_alu));
- alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN);
- r = tgsi_dst(ctx, &inst->Dst[0], 1, &alu.dst);
- if (r)
- return r;
+ if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
+ memset(&alu, 0, sizeof(struct r600_bc_alu));
+ alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN);
+ r = tgsi_dst(ctx, &inst->Dst[0], 1, &alu.dst);
+ if (r)
+ return r;
+
+ alu.src[0].sel = ctx->temp_reg;
+ alu.src[0].chan = 0;
+ alu.last = 1;
+ r = r600_bc_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
+ }
- alu.src[0].sel = ctx->temp_reg;
- alu.src[0].chan = 0;
- alu.last = 1;
- r = r600_bc_add_alu(ctx->bc, &alu);
- if (r)
- return r;
return 0;
}
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