Mesa (master): Revert "i965: Always set tiling for depth buffer on sandybridge"
Zhenyu Wang
zhen at kemper.freedesktop.org
Wed Sep 29 07:24:24 UTC 2010
Module: Mesa
Branch: master
Commit: d4da253b298677c63def5f2f774608d660be31a1
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d4da253b298677c63def5f2f774608d660be31a1
Author: Zhenyu Wang <zhenyuw at linux.intel.com>
Date: Wed Sep 29 15:18:37 2010 +0800
Revert "i965: Always set tiling for depth buffer on sandybridge"
This reverts commit 0a1910c26760762eb8d67f68dfd87494ab479e38.
oops, shouldn't apply tiling depth buffer for other chips as well.
---
src/mesa/drivers/dri/i965/brw_misc_state.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 7a33412..6eeaba7 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -289,7 +289,7 @@ static void emit_depthbuffer(struct brw_context *brw)
OUT_BATCH(((region->pitch * region->cpp) - 1) |
(format << 18) |
(BRW_TILEWALK_YMAJOR << 26) |
- (1 << 27) |
+ ((region->tiling != I915_TILING_NONE) << 27) |
(BRW_SURFACE_2D << 29));
OUT_RELOC(region->buffer,
I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
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