Mesa (master): Revert "i965: clear global offset to zero in m0. 2 for VS DP read."

[Nan hai Zou]

Module: Mesa
Branch: master
Commit: 2432ca1c2e205100d48070305ba2d5f8978bce03
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2432ca1c2e205100d48070305ba2d5f8978bce03

Author: Zou Nan hai <nanhai.zou at intel.com>
Date:   Tue Apr 12 10:52:50 2011 +0800

Revert "i965:   clear global offset to zero in m0.2 for VS DP read."

This reverts commit 66b66295d0bc856c69fdcccc22575580c7ecee16.
it was already fixed by commit 9d60a7ce08a67eb8b79c60f829d090ba4a37ed7e

---

 src/mesa/drivers/dri/i965/brw_eu_emit.c |    9 ---------
 1 files changed, 0 insertions(+), 9 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index c5cde22..57313a5 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -1759,11 +1759,6 @@ void brw_dp_READ_4_vs(struct brw_compile *p,
    brw_set_compression_control(p, BRW_COMPRESSION_NONE);
    brw_set_mask_control(p, BRW_MASK_DISABLE);
    brw_set_predicate_control(p, BRW_PREDICATE_NONE);
-
-   /* M0.2 is global offset */
-   brw_MOV(p, retype(get_element(brw_message_reg(0), 2), BRW_REGISTER_TYPE_D),
-                   brw_imm_d(0));
-
    brw_MOV(p, retype(brw_vec1_reg(BRW_MESSAGE_REGISTER_FILE, msg_reg_nr, 2),
 		     BRW_REGISTER_TYPE_UD),
 	   brw_imm_ud(location));
@@ -1814,10 +1809,6 @@ void brw_dp_READ_4_vs_relative(struct brw_compile *p,
    brw_set_mask_control(p, BRW_MASK_DISABLE);
    brw_set_predicate_control(p, BRW_PREDICATE_NONE);
 
-   /* M0.2 is global offset */
-   brw_MOV(p, retype(get_element(brw_message_reg(0), 2), BRW_REGISTER_TYPE_D),
-                   brw_imm_d(0));
-
    /* M1.0 is block offset 0, M1.4 is block offset 1, all other
     * fields ignored.
     */